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#define | AT86RF2XX_REG__TRX_STATUS (0x01) |
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#define | AT86RF2XX_REG__TRX_STATE (0x02) |
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#define | AT86RF2XX_REG__TRX_CTRL_0 (0x03) |
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#define | AT86RF2XX_REG__TRX_CTRL_1 (0x04) |
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#define | AT86RF2XX_REG__PHY_TX_PWR (0x05) |
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#define | AT86RF2XX_REG__PHY_RSSI (0x06) |
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#define | AT86RF2XX_REG__PHY_ED_LEVEL (0x07) |
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#define | AT86RF2XX_REG__PHY_CC_CCA (0x08) |
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#define | AT86RF2XX_REG__CCA_THRES (0x09) |
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#define | AT86RF2XX_REG__RX_CTRL (0x0A) |
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#define | AT86RF2XX_REG__SFD_VALUE (0x0B) |
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#define | AT86RF2XX_REG__TRX_CTRL_2 (0x0C) |
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#define | AT86RF2XX_REG__ANT_DIV (0x0D) |
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#define | AT86RF2XX_REG__IRQ_MASK (0x0E) |
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#define | AT86RF2XX_REG__IRQ_STATUS (0x0F) |
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#define | AT86RF2XX_REG__VREG_CTRL (0x10) |
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#define | AT86RF2XX_REG__BATMON (0x11) |
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#define | AT86RF2XX_REG__XOSC_CTRL (0x12) |
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#define | AT86RF2XX_REG__CC_CTRL_1 (0x14) |
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#define | AT86RF2XX_REG__RX_SYN (0x15) |
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#define | AT86RF2XX_REG__XAH_CTRL_1 (0x17) |
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#define | AT86RF2XX_REG__FTN_CTRL (0x18) |
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#define | AT86RF2XX_REG__PLL_CF (0x1A) |
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#define | AT86RF2XX_REG__PLL_DCU (0x1B) |
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#define | AT86RF2XX_REG__PART_NUM (0x1C) |
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#define | AT86RF2XX_REG__VERSION_NUM (0x1D) |
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#define | AT86RF2XX_REG__MAN_ID_0 (0x1E) |
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#define | AT86RF2XX_REG__MAN_ID_1 (0x1F) |
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#define | AT86RF2XX_REG__SHORT_ADDR_0 (0x20) |
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#define | AT86RF2XX_REG__SHORT_ADDR_1 (0x21) |
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#define | AT86RF2XX_REG__PAN_ID_0 (0x22) |
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#define | AT86RF2XX_REG__PAN_ID_1 (0x23) |
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#define | AT86RF2XX_REG__IEEE_ADDR_0 (0x24) |
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#define | AT86RF2XX_REG__IEEE_ADDR_1 (0x25) |
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#define | AT86RF2XX_REG__IEEE_ADDR_2 (0x26) |
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#define | AT86RF2XX_REG__IEEE_ADDR_3 (0x27) |
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#define | AT86RF2XX_REG__IEEE_ADDR_4 (0x28) |
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#define | AT86RF2XX_REG__IEEE_ADDR_5 (0x29) |
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#define | AT86RF2XX_REG__IEEE_ADDR_6 (0x2A) |
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#define | AT86RF2XX_REG__IEEE_ADDR_7 (0x2B) |
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#define | AT86RF2XX_REG__XAH_CTRL_0 (0x2C) |
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#define | AT86RF2XX_REG__CSMA_SEED_0 (0x2D) |
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#define | AT86RF2XX_REG__CSMA_SEED_1 (0x2E) |
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#define | AT86RF2XX_REG__CSMA_BE (0x2F) |
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#define | AT86RF2XX_REG__TST_CTRL_DIGI (0x36) |
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#define | AT86RF2XX_TRX_CTRL_0_MASK__PAD_IO (0xC0) |
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#define | AT86RF2XX_TRX_CTRL_0_MASK__PAD_IO_CLKM (0x30) |
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#define | AT86RF2XX_TRX_CTRL_0_MASK__CLKM_SHA_SEL (0x08) |
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#define | AT86RF2XX_TRX_CTRL_0_MASK__CLKM_CTRL (0x07) |
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#define | AT86RF2XX_TRX_CTRL_0_DEFAULT__PAD_IO (0x00) |
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#define | AT86RF2XX_TRX_CTRL_0_DEFAULT__PAD_IO_CLKM (0x10) |
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#define | AT86RF2XX_TRX_CTRL_0_DEFAULT__CLKM_SHA_SEL (0x08) |
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#define | AT86RF2XX_TRX_CTRL_0_DEFAULT__CLKM_CTRL (0x01) |
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#define | AT86RF2XX_TRX_CTRL_0_CLKM_CTRL__OFF (0x00) |
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#define | AT86RF2XX_TRX_CTRL_0_CLKM_CTRL__1MHz (0x01) |
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#define | AT86RF2XX_TRX_CTRL_0_CLKM_CTRL__2MHz (0x02) |
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#define | AT86RF2XX_TRX_CTRL_0_CLKM_CTRL__4MHz (0x03) |
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#define | AT86RF2XX_TRX_CTRL_0_CLKM_CTRL__8MHz (0x04) |
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#define | AT86RF2XX_TRX_CTRL_0_CLKM_CTRL__16MHz (0x05) |
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#define | AT86RF2XX_TRX_CTRL_0_CLKM_CTRL__250kHz (0x06) |
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#define | AT86RF2XX_TRX_CTRL_0_CLKM_CTRL__62_5kHz (0x07) |
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#define | AT86RF2XX_TRX_STATUS_MASK__CCA_DONE (0x80) |
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#define | AT86RF2XX_TRX_STATUS_MASK__CCA_STATUS (0x40) |
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#define | AT86RF2XX_TRX_STATUS_MASK__TRX_STATUS (0x1F) |
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#define | AT86RF2XX_TRX_STATUS__P_ON (0x00) |
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#define | AT86RF2XX_TRX_STATUS__BUSY_RX (0x01) |
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#define | AT86RF2XX_TRX_STATUS__BUSY_TX (0x02) |
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#define | AT86RF2XX_TRX_STATUS__RX_ON (0x06) |
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#define | AT86RF2XX_TRX_STATUS__TRX_OFF (0x08) |
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#define | AT86RF2XX_TRX_STATUS__PLL_ON (0x09) |
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#define | AT86RF2XX_TRX_STATUS__SLEEP (0x0F) |
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#define | AT86RF2XX_TRX_STATUS__BUSY_RX_AACK (0x11) |
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#define | AT86RF2XX_TRX_STATUS__BUSY_TX_ARET (0x12) |
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#define | AT86RF2XX_TRX_STATUS__RX_AACK_ON (0x16) |
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#define | AT86RF2XX_TRX_STATUS__TX_ARET_ON (0x19) |
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#define | AT86RF2XX_TRX_STATUS__RX_ON_NOCLK (0x1C) |
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#define | AT86RF2XX_TRX_STATUS__RX_AACK_ON_NOCLK (0x1D) |
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#define | AT86RF2XX_TRX_STATUS__BUSY_RX_AACK_NOCLK (0x1E) |
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#define | AT86RF2XX_TRX_STATUS__STATE_TRANSITION_IN_PROGRESS (0x1F) |
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#define | AT86RF2XX_TRX_STATE_MASK__TRAC (0xe0) |
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#define | AT86RF2XX_TRX_STATE__NOP (0x00) |
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#define | AT86RF2XX_TRX_STATE__TX_START (0x02) |
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#define | AT86RF2XX_TRX_STATE__FORCE_TRX_OFF (0x03) |
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#define | AT86RF2XX_TRX_STATE__FORCE_PLL_ON (0x04) |
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#define | AT86RF2XX_TRX_STATE__RX_ON (0x06) |
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#define | AT86RF2XX_TRX_STATE__TRX_OFF (0x08) |
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#define | AT86RF2XX_TRX_STATE__PLL_ON (0x09) |
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#define | AT86RF2XX_TRX_STATE__RX_AACK_ON (0x16) |
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#define | AT86RF2XX_TRX_STATE__TX_ARET_ON (0x19) |
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#define | AT86RF2XX_TRX_STATE__TRAC_SUCCESS (0x00) |
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#define | AT86RF2XX_TRX_STATE__TRAC_SUCCESS_DATA_PENDING (0x20) |
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#define | AT86RF2XX_TRX_STATE__TRAC_SUCCESS_WAIT_FOR_ACK (0x40) |
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#define | AT86RF2XX_TRX_STATE__TRAC_CHANNEL_ACCESS_FAILURE (0x60) |
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#define | AT86RF2XX_TRX_STATE__TRAC_NO_ACK (0xa0) |
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#define | AT86RF2XX_TRX_STATE__TRAC_INVALID (0xe0) |
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