cpu_conf_stm32_common.h
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1 /*
2  * Copyright (C) 2018 Inria
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser
5  * General Public License v2.1. See the file LICENSE in the top level
6  * directory for more details.
7  */
8 
19 #ifndef CPU_CONF_STM32_COMMON_H
20 #define CPU_CONF_STM32_COMMON_H
21 
22 #include "periph_cpu.h"
23 
24 #include "periph/i2c.h"
25 
26 #ifdef __cplusplus
27 extern "C" {
28 #endif
29 
30 #if defined(CPU_FAM_STM32F0) || defined(CPU_FAM_STM32F3) || \
31  defined(CPU_FAM_STM32F7) || defined(CPU_FAM_STM32L0) || \
32  defined(CPU_FAM_STM32L4) || defined(CPU_FAM_STM32L4) || \
33  defined(CPU_FAM_STM32WB) || defined(CPU_FAM_STM32G4) || \
34  defined(CPU_FAM_STM32G0) || defined(CPU_FAM_STM32L5)
35 
41 static const i2c_timing_param_t timing_params[] = {
42 #if defined(CPU_FAM_STM32F0) || defined(CPU_FAM_STM32F7) || \
43  defined(CPU_FAM_STM32L4) || defined(CPU_FAM_STM32WB) || \
44  defined(CPU_FAM_STM32G4) || defined(CPU_FAM_STM32G0) || \
45  defined(CPU_FAM_STM32L5)
46  [ I2C_SPEED_NORMAL ] = {
47  .presc = 0xB,
48  .scll = 0x13, /* t_SCLL = 5.0us */
49  .sclh = 0xF, /* t_SCLH = 4.0us */
50  .sdadel = 0x2, /* t_SDADEL = 500ns */
51  .scldel = 0x4, /* t_SCLDEL = 1250ns */
52  },
53  [ I2C_SPEED_FAST ] = {
54  .presc = 5,
55  .scll = 0x9, /* t_SCLL = 1250ns */
56  .sclh = 0x3, /* t_SCLH = 500ns */
57  .sdadel = 0x3, /* t_SDADEL = 375ns */
58  .scldel = 0x3, /* t_SCLDEL = 500ns */
59  },
60  [ I2C_SPEED_FAST_PLUS ] = {
61  .presc = 5,
62  .scll = 0x3, /* t_SCLL = 500ns */
63  .sclh = 0x1, /* t_SCLH = 250ns */
64  .sdadel = 0x0, /* t_SDADEL = 0ns */
65  .scldel = 0x1, /* t_SCLDEL = 250ns */
66  }
67 #elif defined(CPU_FAM_STM32F3)
68  [ I2C_SPEED_NORMAL ] = {
69  .presc = 1,
70  .scll = 0x13, /* t_SCLL = 5.0us */
71  .sclh = 0xF, /* t_SCLH = 4.0us */
72  .sdadel = 0x2, /* t_SDADEL = 500ns */
73  .scldel = 0x4, /* t_SCLDEL = 1250ns */
74  },
75  [ I2C_SPEED_FAST ] = {
76  .presc = 0,
77  .scll = 0x9, /* t_SCLL = 1250ns */
78  .sclh = 0x3, /* t_SCLH = 500ns */
79  .sdadel = 0x1, /* t_SDADEL = 125ns */
80  .scldel = 0x3, /* t_SCLDEL = 500ns */
81  },
82  [ I2C_SPEED_FAST_PLUS ] = {
83  .presc = 0,
84  .scll = 0x6, /* t_SCLL = 875ns */
85  .sclh = 0x3, /* t_SCLH = 500ns */
86  .sdadel = 0x0, /* t_SDADEL = 0ns */
87  .scldel = 0x1, /* t_SCLDEL = 250ns */
88  }
89 #elif defined(CPU_FAM_STM32L0)
90  [ I2C_SPEED_NORMAL ] = {
91  .presc = 1,
92  .scll = 0x56, /* t_SCLL = 5.0us */
93  .sclh = 0x3E, /* t_SCLH = 4.0us */
94  .sdadel = 0x1, /* t_SDADEL = 500ns */
95  .scldel = 0xA, /* t_SCLDEL = 1250ns */
96  },
97  [ I2C_SPEED_FAST ] = {
98  .presc = 0,
99  .scll = 0x2E, /* t_SCLL = 1250ns */
100  .sclh = 0x11, /* t_SCLH = 500ns */
101  .sdadel = 0x1, /* t_SDADEL = 125ns */
102  .scldel = 0xB, /* t_SCLDEL = 500ns */
103  },
104  [ I2C_SPEED_FAST_PLUS ] = {
105  .presc = 0,
106  .scll = 0x6, /* t_SCLL = 875ns */
107  .sclh = 0x3, /* t_SCLH = 500ns */
108  .sdadel = 0x0, /* t_SDADEL = 0ns */
109  .scldel = 0x1, /* t_SCLDEL = 250ns */
110  }
111 #endif
112 };
113 
114 #endif /* CPU_FAM_STM32F0 || CPU_FAM_STM32F3 || CPU_FAM_STM32F7 ||
115  CPU_FAM_STM32L0 || CPU_FAM_STM32L4 || CPU_FAM_STM32WB ||
116  CPU_FAM_STM32G4 || CPU_FAM_STM32G0 || CPU_FAM_STM32L5 */
117 
118 #ifdef __cplusplus
119 }
120 #endif
121 
122 #endif /* CPU_CONF_STM32_COMMON_H */
123 
I2C_SPEED_NORMAL
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition: i2c.h:177
periph_cpu.h
Shared CPU specific definitions for the STM32 family.
I2C_SPEED_FAST_PLUS
@ I2C_SPEED_FAST_PLUS
fast plus mode: ~1000 kbit/s
Definition: i2c.h:179
I2C_SPEED_FAST
@ I2C_SPEED_FAST
fast mode: ~400 kbit/s
Definition: i2c.h:178
i2c.h
Low-level I2C peripheral driver interface definition.