cfg_clock_values.h
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1 /*
2  * Copyright (C) 2018 Freie Universität Berlin
3  * 2017 OTA keys S.A.
4  * 2018-2020 Inria
5  *
6  * This file is subject to the terms and conditions of the GNU Lesser
7  * General Public License v2.1. See the file LICENSE in the top level
8  * directory for more details.
9  */
10 
23 #ifndef CLK_F2F4F7_CFG_CLOCK_VALUES_H
24 #define CLK_F2F4F7_CFG_CLOCK_VALUES_H
25 
26 #ifdef __cplusplus
27 extern "C" {
28 #endif
29 
34 #if IS_ACTIVE(CONFIG_BOARD_HAS_HSE)
35 #define CLOCK_PLL_SRC (CLOCK_HSE)
36 #else /* CLOCK_HSI */
37 #define CLOCK_PLL_SRC (CLOCK_HSI)
38 #endif
39 
40 #if IS_ACTIVE(CONFIG_USE_CLOCK_HSI)
41 #define CLOCK_CORECLOCK (CLOCK_HSI)
42 
43 #elif IS_ACTIVE(CONFIG_USE_CLOCK_HSE)
44 #if !IS_ACTIVE(CONFIG_BOARD_HAS_HSE)
45 #error "The board doesn't provide an HSE oscillator"
46 #endif
47 #define CLOCK_CORECLOCK (CLOCK_HSE)
48 
49 #elif IS_ACTIVE(CONFIG_USE_CLOCK_PLL)
50 #define CLOCK_CORECLOCK (((CLOCK_PLL_SRC / CONFIG_CLOCK_PLL_M) * CONFIG_CLOCK_PLL_N) / CONFIG_CLOCK_PLL_P)
51 #endif /* CONFIG_USE_CLOCK_PLL */
52 
53 #define CLOCK_PLLQ (((CLOCK_PLL_SRC / CONFIG_CLOCK_PLL_M) * CONFIG_CLOCK_PLL_N) / CONFIG_CLOCK_PLL_Q)
54 
55 #define CLOCK_AHB CLOCK_CORECLOCK
56 #define CLOCK_APB1 (CLOCK_CORECLOCK / CONFIG_CLOCK_APB1_DIV)
57 #define CLOCK_APB2 (CLOCK_CORECLOCK / CONFIG_CLOCK_APB2_DIV)
58 
61 #ifdef __cplusplus
62 }
63 #endif
64 
65 #endif /* CLK_F2F4F7_CFG_CLOCK_VALUES_H */
66