board.h
Go to the documentation of this file.
1 /*
2  * Copyright (C) 2017 Eistec AB
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser General
5  * Public License v2.1. See the file LICENSE in the top level directory for more
6  * details.
7  */
8 
19 #ifndef BOARD_H
20 #define BOARD_H
21 
22 #include "cpu.h"
23 #include "periph_conf.h"
24 
25 #ifdef __cplusplus
26 extern "C"
27 {
28 #endif
29 
34 #define LED0_PIN GPIO_PIN(PORT_A, 1)
35 #define LED1_PIN GPIO_PIN(PORT_A, 2)
36 #define LED2_PIN GPIO_PIN(PORT_D, 5)
37 
38 #define LED0_MASK (1 << 1)
39 #define LED1_MASK (1 << 2)
40 #define LED2_MASK (1 << 5)
41 
42 #define LED0_ON (GPIOA->PCOR = LED0_MASK)
43 #define LED0_OFF (GPIOA->PSOR = LED0_MASK)
44 #define LED0_TOGGLE (GPIOA->PTOR = LED0_MASK)
45 
46 #define LED1_ON (GPIOA->PCOR = LED1_MASK)
47 #define LED1_OFF (GPIOA->PSOR = LED1_MASK)
48 #define LED1_TOGGLE (GPIOA->PTOR = LED1_MASK)
49 
50 #define LED2_ON (GPIOD->PCOR = LED2_MASK)
51 #define LED2_OFF (GPIOD->PSOR = LED2_MASK)
52 #define LED2_TOGGLE (GPIOD->PTOR = LED2_MASK)
53 
59 /* SW2, SW3 will short these pins to ground when pushed. Both pins have external
60  * pull-up resistors to VDD */
61 /* BTN0 is mapped to SW2 */
62 #define BTN0_PIN GPIO_PIN(PORT_C, 1)
63 #define BTN0_MODE GPIO_IN
64 /* BTN1 is mapped to SW3 */
65 #define BTN1_PIN GPIO_PIN(PORT_B, 17)
66 #define BTN1_MODE GPIO_IN
67 
73 #define FXOS8700_PARAM_I2C I2C_DEV(0)
74 #define FXOS8700_PARAM_ADDR 0x1C
75 
80 void board_init(void);
81 
82 #ifdef __cplusplus
83 }
84 #endif
85 
86 #endif /* BOARD_H */
87 
board_init
void board_init(void)
Board level initialization.
periph_conf.h