29 #define HTS221_DEVICE_ID (0xBC)
34 #define HTS221_REGS_WHO_AM_I (0x0F)
35 #define HTS221_REGS_AV_CONF (0x10)
36 #define HTS221_REGS_CTRL_REG1 (0x20)
37 #define HTS221_REGS_CTRL_REG2 (0x21)
38 #define HTS221_REGS_CTRL_REG3 (0x22)
39 #define HTS221_REGS_STATUS_REG (0x27)
40 #define HTS221_REGS_HUMIDITY_OUT_L (0x28)
41 #define HTS221_REGS_HUMIDITY_OUT_H (0x29)
42 #define HTS221_REGS_TEMP_OUT_L (0x2A)
43 #define HTS221_REGS_TEMP_OUT_H (0x2B)
50 #define HTS221_REGS_H0_RH_X2 (0x30)
51 #define HTS221_REGS_H1_RH_X2 (0x31)
52 #define HTS221_REGS_T0_DEGC_X8 (0x32)
53 #define HTS221_REGS_T1_DEGC_X8 (0x33)
54 #define HTS221_REGS_T1_T0_MSB (0x35)
55 #define HTS221_REGS_H0_T0_OUT_L (0x36)
56 #define HTS221_REGS_H0_T0_OUT_H (0x37)
57 #define HTS221_REGS_H1_T0_OUT_L (0x3A)
58 #define HTS221_REGS_H1_T0_OUT_H (0x3B)
59 #define HTS221_REGS_T0_OUT_L (0x3C)
60 #define HTS221_REGS_T0_OUT_H (0x3D)
61 #define HTS221_REGS_T1_OUT_L (0x3E)
62 #define HTS221_REGS_T1_OUT_H (0x3F)
70 #define HTS221_REGS_AVGT_SHIFT (3U)
77 HTS221_REGS_AVGH_4 = 0,
93 HTS221_REGS_AVGT_2 = 0,
108 #define HTS221_REGS_CTRL_REG1_PD_ACTIVE (1 << 7)
109 #define HTS221_REGS_CTRL_REG1_BDU (1 << 2)
116 HTS221_REGS_CTRL_REG1_ODR_ONE_SHOT = 0,
117 HTS221_REGS_CTRL_REG1_ODR_1HZ,
118 HTS221_REGS_CTRL_REG1_ODR_7HZ,
119 HTS221_REGS_CTRL_REG1_ODR_12HZ
126 #define HTS221_REGS_CTRL_REG2_BOOT (1 << 7)
127 #define HTS221_REGS_CTRL_REG2_HEATER (1 << 1)
128 #define HTS221_REGS_CTRL_REG2_OS_EN (1 << 0)
135 #define HTS221_REGS_CTRL_REG3_DRDY_HL (1 << 7)
136 #define HTS221_REGS_CTRL_REG3_PP_OD (1 << 6)
137 #define HTS221_REGS_CTRL_REG3_DRDY_EN (1 << 2)
144 #define HTS221_REGS_STATUS_REG_TDA (1 << 0)
145 #define HTS221_REGS_STATUS_REG_HDA (1 << 1)