board.h
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1 /*
2  * Copyright (C) 2014 Eistec AB
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser General
5  * Public License v2.1. See the file LICENSE in the top level directory for more
6  * details.
7  */
8 
19 #ifndef BOARD_H
20 #define BOARD_H
21 
22 #include "cpu.h"
23 #include "periph_conf.h"
24 #include "mulle-nvram.h"
25 #include "mtd.h"
26 
27 /* Use the on board RTC 32kHz clock for LPTMR clocking. */
28 #undef LPTIMER_CLKSRC
29 
30 #define LPTIMER_CLKSRC LPTIMER_CLKSRC_ERCLK32K
31 
33 #define DISABLE_WDOG 1
34 
38 #define STDIO_UART_DEV UART_DEV(1)
39 
44 #if 0
45 /* LPTMR xtimer configuration */
46 /* WIP, Use PIT for now */
47 #define XTIMER_DEV (TIMER_LPTMR_DEV(0))
48 /* LPTMR is 16 bits wide */
49 #define XTIMER_WIDTH (16)
50 #define XTIMER_BACKOFF (4)
51 #define XTIMER_ISR_BACKOFF (4)
52 #define XTIMER_HZ (32768ul)
53 #else
54 /* PIT xtimer configuration */
55 #define XTIMER_DEV (TIMER_PIT_DEV(0))
56 #define XTIMER_CHAN (0)
57 #define XTIMER_BACKOFF (40)
58 #define XTIMER_ISR_BACKOFF (40)
59 #endif
60 
66 #define LED_PORT PTC
67 #define LED0_BIT (15)
68 #define LED1_BIT (14)
69 #define LED2_BIT (13)
70 
71 #define LED0_PIN GPIO_PIN(PORT_C, LED0_BIT)
72 #define LED1_PIN GPIO_PIN(PORT_C, LED1_BIT)
73 #define LED2_PIN GPIO_PIN(PORT_C, LED2_BIT)
74 
75 #define LED0_ON (LED_PORT->PSOR = (1 << LED0_BIT))
76 #define LED0_OFF (LED_PORT->PCOR = (1 << LED0_BIT))
77 #define LED0_TOGGLE (LED_PORT->PTOR = (1 << LED0_BIT))
78 
79 #define LED1_ON (LED_PORT->PSOR = (1 << LED1_BIT))
80 #define LED1_OFF (LED_PORT->PCOR = (1 << LED1_BIT))
81 #define LED1_TOGGLE (LED_PORT->PTOR = (1 << LED1_BIT))
82 
83 #define LED2_ON (LED_PORT->PSOR = (1 << LED2_BIT))
84 #define LED2_OFF (LED_PORT->PCOR = (1 << LED2_BIT))
85 #define LED2_TOGGLE (LED_PORT->PTOR = (1 << LED2_BIT))
86 
88 #ifdef __cplusplus
89 extern "C" {
90 #endif
91 
95 void board_init(void);
96 
97 #ifdef __cplusplus
98 }
99 #endif
100 
111 #define AT86RF2XX_PARAM_CS SPI_HWCS(1)
112 #define AT86RF2XX_PARAM_INT GPIO_PIN(PORT_B, 9)
113 #define AT86RF2XX_PARAM_SLEEP GPIO_PIN(PORT_E, 6)
114 #define AT86RF2XX_PARAM_RESET GPIO_PIN(PORT_C, 12)
115 
121 #define LIS3DH_PARAM_INT1 GPIO_PIN(PORT_C, 18)
122 #define LIS3DH_PARAM_INT2 GPIO_PIN(PORT_C, 17)
123 #define LIS3DH_PARAM_CS SPI_HWCS(0)
124 #define LIS3DH_PARAM_CLK (SPI_CLK_5MHZ)
125 
131 #define MULLE_POWER_AVDD GPIO_PIN(PORT_B, 17)
132 #define MULLE_POWER_VPERIPH GPIO_PIN(PORT_D, 7)
133 #define MULLE_POWER_VSEC GPIO_PIN(PORT_B, 16)
140 #define MULLE_NVRAM_SPI_DEV SPI_DEV(0)
141 #define MULLE_NVRAM_SPI_CLK SPI_CLK_5MHZ
142 #define MULLE_NVRAM_SPI_CS SPI_HWCS(3)
143 #define MULLE_NVRAM_CAPACITY 512
144 #define MULLE_NVRAM_SPI_ADDRESS_COUNT 1
151 #define MULLE_NOR_SPI_DEV SPI_DEV(0)
152 #define MULLE_NOR_SPI_CLK SPI_CLK_5MHZ
153 #define MULLE_NOR_SPI_CS SPI_HWCS(2)
159 extern mtd_dev_t *mtd0;
160 #define MTD_0 mtd0
161 
167 #define MULLE_VBAT_ADC_LINE ADC_LINE(6)
168 #define MULLE_VCHR_ADC_LINE ADC_LINE(7)
169 
170 #endif /* BOARD_H */
171 
mulle-nvram.h
NVRAM offsets for the Eistec Mulle IoT board.
periph_conf.h
board_init
void board_init(void)
Board level initialization.