board.h
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1 /*
2  * Copyright (C) 2018 Eistec AB
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser General
5  * Public License v2.1. See the file LICENSE in the top level directory for more
6  * details.
7  */
8 
19 #ifndef BOARD_H
20 #define BOARD_H
21 
22 #include "cpu.h"
23 #include "board_common.h"
24 #include "periph_conf.h"
25 
26 #ifdef __cplusplus
27 extern "C"
28 {
29 #endif
30 
31 /* PTB18 is configured for non-maskable interrupt at power on reset, but it is
32  * also connected to the LED that is used by the JLink OpenSDA application as a
33  * status indicator, which causes the KW41Z to become stuck in the NMI handler
34  * at power on because the debugger interface is pulling the pin low to enable
35  * the LED to show that it is connected. */
36 /* Set the FOPT bit to disable NMI so that we can use it as a GPIO pin for the LED */
37 #define KINETIS_FOPT (0xff & ~(NV_FOPT_NMI_DIS_MASK))
38 
42 /* The LED pins on this board are connected to both the KW41Z and to the OpenSDA
43  * K22F MCU, which may cause some issues between the two MCUs. The safest way to
44  * use these LEDs is to cut the intentional shorts SH5, SH6 between the K22F and
45  * the KW41Z. Cutting these traces will leave the KW41Z connected to the LEDs
46  * but the K22F will be cut off. */
47 /* The connected pin on the K22F (PTC6) is configured as an input when running
48  * the JLink OpenSDA application, so it should be reasonably safe to use this
49  * LED from the KW41Z */
50 #define LED0_PIN GPIO_PIN(PORT_B, 3)
51 #define LED0_MASK (1 << 3)
52 #define LED0_ON (GPIOB->PCOR = LED0_MASK)
53 #define LED0_OFF (GPIOB->PSOR = LED0_MASK)
54 #define LED0_TOGGLE (GPIOB->PTOR = LED0_MASK)
55 /* Enable this only if you have cut the intentional short SH6 which connects
56  * the debugger pin to the LED and KW41Z PTB18. Otherwise we may end up with one
57  * MCU driving the pin high and the other driving it low */
58 #if 0 /* user has cut SH6 */
59 /* The connected pin on the K22F (PTC7) is configured as a digital output with
60  * high drive strength enabled in the JLink OpenSDA application, so this should
61  * definitely not be configured as a digital output on the KW41Z unless the
62  * corresponding short SH6 has been cut.*/
63 #define LED1_PIN GPIO_PIN(PORT_B, 18)
64 #define LED1_MASK (1 << 18)
65 #define LED1_ON (GPIOB->PCOR = LED1_MASK)
66 #define LED1_OFF (GPIOB->PSOR = LED1_MASK)
67 #define LED1_TOGGLE (GPIOB->PTOR = LED1_MASK)
68 #endif /* user has cut SH6 */
69 
75 /* Pressing SW1 will short this pin to ground but there are no external pull
76  * resistors, use internal pull-up on the pin */
77 /* BTN0 is mapped to SW1 */
78 #define BTN0_PIN GPIO_PIN(PORT_B, 2)
79 #define BTN0_MODE GPIO_IN_PU
80 
86 #if KINETIS_XTIMER_SOURCE_PIT
87 /* PIT xtimer configuration */
88 #define XTIMER_DEV (TIMER_PIT_DEV(0))
89 #define XTIMER_CHAN (0)
90 /* Default xtimer settings should work on the PIT */
91 #else
92 /* LPTMR xtimer configuration */
93 #define XTIMER_DEV (TIMER_LPTMR_DEV(0))
94 #define XTIMER_CHAN (0)
95 /* LPTMR is 16 bits wide and runs at 32768 Hz (clocked by the RTC) */
96 #define XTIMER_WIDTH (16)
97 #define XTIMER_BACKOFF (5)
98 #define XTIMER_ISR_BACKOFF (5)
99 #define XTIMER_HZ (32768ul)
100 #endif
101 
107 #define CONFIG_ZTIMER_USEC_TYPE ZTIMER_TYPE_PERIPH_TIMER
108 #define CONFIG_ZTIMER_USEC_DEV (TIMER_PIT_DEV(0))
109 #define CONFIG_ZTIMER_USEC_FREQ (1000000LU)
110 #define CONFIG_ZTIMER_USEC_WIDTH (32)
111 
113 #ifdef __cplusplus
114 }
115 #endif
116 
117 #endif /* BOARD_H */
118 
periph_conf.h