board.h
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1 /*
2  * Copyright (C) 2014 Freie Universität Berlin, Hinnerk van Bruinehsen
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser
5  * General Public License v2.1. See the file LICENSE in the top level
6  * directory for more details.
7  */
8 
20 #ifndef BOARD_H
21 #define BOARD_H
22 
23 #include "cpu.h"
24 #include "waspmote_pinmap.h"
25 
26 #ifdef __cplusplus
27 extern "C" {
28 #endif
29 
34 #define STDIO_UART_BAUDRATE (9600U)
35 
40 #ifdef XBEE_UART
41 #if XBEE_UART == 0
42 #define STDIO_UART_DEV (UART_DEV(1))
43 #else
44 #define STDIO_UART_DEV (UART_DEV(0))
45 #endif
46 #endif
47 
52 #define LED0_PORT PORTD
53 #define LED1_PORT PORTC
54 #define LED0_PIN (1 << 6)
55 #define LED1_PIN (1 << 1)
56 
62 #define LED0_ENABLE_PORT DDRD |= (1 << DDD6)
63 #define LED0_ON LED0_PORT |= LED0_PIN
64 #define LED0_OFF LED0_PORT &= ~LED0_PIN
65 #define LED0_TOGGLE LED0_PORT ^= LED0_PIN;
66 
67 #define LED1_ENABLE_PORT DDRC |= (1 << DDC1)
68 #define LED1_ON LED1_PORT |= LED1_PIN
69 #define LED1_OFF LED1_PORT &= ~LED1_PIN
70 #define LED1_TOGGLE LED1_PORT ^= LED1_PIN;
71 
72 /* for compatibility to other boards */
73 #define LED_GREEN_ON LED1_ON
74 #define LED_GREEN_OFF LED1_OFF
75 #define LED_GREEN_TOGGLE LED1_TOGGLE
76 #define LED_RED_ON LED0_ON
77 #define LED_RED_OFF LED0_OFF
78 #define LED_RED_TOGGLE LED0_TOGGLE
79 
85 #define LED_PANIC LED_RED_ON
86 
92 #define MUX_PW_PORT PORTD
93 #define MUX0_PORT PORTB
94 #define MUX1_PORT PORTB
95 #define MUX_USB_XBEE_PORT PORTD
96 #define MUX_PW_PIN (1 << 7)
97 #define MUX0_PIN (1 << 6)
98 #define MUX1_PIN (1 << 7)
99 #define MUX_USB_XBEE_PIN (1 << 5)
100 
101 #define MUX_PW_ENABLE_PORT DDRD |= (1 << DDD7);
102 #define MUX_PW_ON MUX_PW_PORT |= MUX_PW_PIN
103 #define MUX_PW_OFF MUX_PW_PORT &= ~MUX_PW_PIN
104 
105 #define MUX0_ENABLE_PORT DDRB |= (1 << DDB6)
106 #define MUX0_ON MUX0_PORT |= MUX0_PIN
107 #define MUX0_OFF MUX0_PORT &= ~MUX0_PIN
108 
109 #define MUX1_ENABLE_PORT DDRB |= (1 << DDB7)
110 #define MUX1_ON MUX1_PORT |= MUX1_PIN
111 #define MUX1_OFF MUX1_PORT &= ~MUX1_PIN
112 
113 #define MUX_USB_XBEE_ENABLE_PORT DDRD |= (1 << DDD5)
114 #define MUX_USB_XBEE_ON MUX_USB_XBEE_PORT |= MUX_USB_XBEE_PIN
115 #define MUX_USB_XBEE_OFF MUX_USB_XBEE_PORT &= ~MUX_USB_XBEE_PIN
116 
117 /* Multiplexer settings to enable UART1 on the desired module
118  *
119  * --------------
120  * MUX0_OFF & MUX1_ON ---> GPS MODULE
121  * MUX0_ON & MUX1_ON ---> SOCKET1
122  * MUX0_ON & MUX1_OFF ---> AUX1 MODULE
123  * MUX0_OFF & MUX1_OFF ---> AUX2 MODULE
124  *
125  * Multiplexer setting to enable UART0 to the desired module
126  *
127  * --------------
128  * MUX_USB_XBEE_OFF ---> USB MODULE
129  * MUX_USB_XBEE_ON ---> SOCKET0
130  *
131  */
132 
133 #define SET_MUX_GPS MUX_PW_ENABLE_PORT; MUX_PW_ON; \
134  MUX0_ENABLE_PORT; MUX1_ENABLE_PORT; \
135  MUX0_OFF; MUX1_ON
136 #define SET_MUX_SOCKET1 MUX_PW_ENABLE_PORT; MUX_PW_ON; \
137  MUX0_ENABLE_PORT; MUX1_ENABLE_PORT; \
138  MUX0_ON; MUX1_ON
139 #define SET_MUX_AUX1_MODULE MUX_PW_ENABLE_PORT; MUX_PW_ON; \
140  MUX0_ENABLE_PORT; MUX1_ENABLE_PORT; \
141  MUX0_ON; MUX1_OFF
142 #define SET_MUX_AUX2_MODULE MUX_PW_ENABLE_PORT; MUX_PW_ON; \
143  MUX0_ENABLE_PORT; MUX1_ENABLE_PORT; \
144  MUX0_OFF; MUX1_OFF
145 #define SET_MUX_USB_MODULE MUX_PW_ENABLE_PORT; MUX_PW_ON; \
146  MUX_USB_XBEE_ENABLE_PORT; \
147  MUX_USB_XBEE_OFF
148 #define SET_MUX_SOCKET0 MUX_PW_ENABLE_PORT; MUX_PW_ON; \
149  MUX_USB_XBEE_ENABLE_PORT; \
150  MUX_USB_XBEE_ON
151 
157 #define CPU_ATMEGA_CLK_SCALE_INIT CPU_ATMEGA_CLK_SCALE_DIV1
158 
167 #define XTIMER_WIDTH (16)
168 #define XTIMER_HZ (230400LU)
169 #define XTIMER_BACKOFF (80)
170 #define XTIMER_ISR_BACKOFF (120)
171 
177 #define CONFIG_ZTIMER_USEC_TYPE ZTIMER_TYPE_PERIPH_TIMER
178 #define CONFIG_ZTIMER_USEC_DEV (TIMER_DEV(0))
179 #define CONFIG_ZTIMER_USEC_FREQ (230400LU)
180 #define CONFIG_ZTIMER_USEC_WIDTH (16)
181 
186 void board_init(void);
187 
188 #ifdef __cplusplus
189 }
190 #endif
191 
192 #endif /* BOARD_H */
193 
waspmote_pinmap.h
Mapping from MCU pins to Waspmote pins.
board_init
void board_init(void)
Board level initialization.