at86rf215_registers.h File Reference

Register Definitions for the AT86RF215 chip. More...

Detailed Description

Register Definitions for the AT86RF215 chip.

Author
Benjamin Valentin benja.nosp@m.min..nosp@m.valen.nosp@m.tin@.nosp@m.ml-pa.nosp@m..com

Definition in file at86rf215_registers.h.

#include <stdint.h>
#include "vendor/at86rf215.h"
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Go to the source code of this file.

Data Structures

struct  at86rf215_RF_regs
 Radio Frontend registers. More...
 
struct  at86rf215_BBC_regs
 Base Band Controller registers. More...
 

Macros

#define CCF0_24G_OFFSET   1500000U
 offset (in Hz) for CCF0 in 2.4 GHz mode
 
#define RF_RCUT_FS_BY_8   (0x0 << RXDFE_RCUT_SHIFT)
 Fcut = 0.25 * Fs/2.
 
#define RF_RCUT_FS_BY_5P3   (0x1 << RXDFE_RCUT_SHIFT)
 Fcut = 0.375 * Fs/2.
 
#define RF_RCUT_FS_BY_4   (0x2 << RXDFE_RCUT_SHIFT)
 Fcut = 0.5 * Fs/2.
 
#define RF_RCUT_FS_BY_2P6   (0x3 << RXDFE_RCUT_SHIFT)
 Fcut = 0.75 * Fs/2.
 
#define RF_RCUT_FS_BY_2   (0x4 << RXDFE_RCUT_SHIFT)
 Fcut = 1.0 * Fs/2.
 
#define BB_MCS_BPSK_REP4   0
 BPSK, rate ½, 4 x frequency repetition.
 
#define BB_MCS_BPSK_REP2   1
 BPSK, rate ½, 2 x frequency repetition.
 
#define BB_MCS_QPSK_REP2   2
 QPSK, rate ½, 2 x frequency repetition.
 
#define BB_MCS_QPSK_1BY2   3
 QPSK, rate ½
 
#define BB_MCS_QPSK_3BY4   4
 QPSK, rate ¾
 
#define BB_MCS_16QAM_1BY2   5
 16-QAM, rate ½
 
#define BB_MCS_16QAM_3BY4   6
 16-QAM, rate ¾
 
#define RXM_MR_OQPSK   0x0
 receive only MR-O-QPSK
 
#define RXM_LEGACY_OQPSK   0x1
 receive only legacy O-QPSK
 
#define RXM_BOTH_OQPSK   0x2
 receive both legacy & MR-O-QPSK
 
#define RXM_DISABLE   0x3
 receive nothing
 
#define FSK_MORD_2SFK   (0 << FSKC0_MORD_SHIFT)
 Modulation Order 2-FSK.
 
#define FSK_MORD_4SFK   (1 << FSKC0_MORD_SHIFT)
 Modulation Order 4-FSK.
 
#define FSKC3_SFDT(n)   (((n) << FSKC3_SFDT_SHIFT) & FSKC3_SFDT_MASK)
 Lower values increase the SFD detector sensitivity. More...
 
#define FSKC3_PDT(n)   (((n) << FSKC3_PDT_SHIFT) & FSKC3_PDT_MASK)
 Lower values increase the preamble detector sensitivity.
 

sub-GHz Radio Frontend register map

static const struct at86rf215_RF_regs RF09_regs
 
static const struct at86rf215_BBC_regs BBC0_regs
 

2.4 GHz Radio Frontend register map

static const struct at86rf215_RF_regs RF24_regs
 
static const struct at86rf215_BBC_regs BBC1_regs
 

Part Numbers

#define AT86RF215_PN   (0x34) /* sub-GHz & 2.4 GHz */
 
#define AT86RF215IQ_PN   (0x35) /* I/Q radio only */
 
#define AT86RF215M_PN   (0x36) /* sub-GHz only */
 

SPI command prefixes

#define FLAG_WRITE   0x8000
 
#define FLAG_READ   0x0000
 

Radio Commands written to RF->RG_CMD

#define CMD_RF_NOP   0x0
 
#define CMD_RF_SLEEP   0x1
 
#define CMD_RF_TRXOFF   0x2
 
#define CMD_RF_TXPREP   0x3
 
#define CMD_RF_TX   0x4
 
#define CMD_RF_RX   0x5
 
#define CMD_RF_RESET
 

Radio States, read from RF->RG_STATE

#define RF_STATE_TRXOFF   0x2 /* Transceiver off, SPI active */
 
#define RF_STATE_TXPREP   0x3 /* Transmit preparation */
 
#define RF_STATE_TX   0x4 /* Transmit */
 
#define RF_STATE_RX   0x5 /* Receive */
 
#define RF_STATE_TRANSITION   0x6 /* State transition in progress */
 
#define RF_STATE_RESET   0x7 /* Transceiver is in state RESET or SLEEP */
 
#define RF_SR_4000K   0x1
 The sub-register configures the sampling frequency of the received signal. More...
 
#define RF_SR_2000K   0x2
 
#define RF_SR_1333K   0x3
 
#define RF_SR_1000K   0x4
 
#define RF_SR_800K   0x5
 
#define RF_SR_666K   0x6
 
#define RF_SR_500K   0x8
 
#define RF_SR_400K   0xA
 
#define RF_DTB_2_US   0x0
 The averaging time is calculated by T[μs]=DF*DTB.
 
#define RF_DTB_8_US   0x1
 
#define RF_DTB_32_US   0x2
 
#define RF_DTB_128_US   0x3
 
#define FSK_MIDX_3_BY_8   (0 << FSKC0_MIDX_SHIFT)
 FSK modulation index.
 
#define FSK_MIDX_4_BY_8   (1 << FSKC0_MIDX_SHIFT)
 
#define FSK_MIDX_6_BY_8   (2 << FSKC0_MIDX_SHIFT)
 
#define FSK_MIDX_8_BY_8   (3 << FSKC0_MIDX_SHIFT)
 
#define FSK_MIDX_10_BY_8   (4 << FSKC0_MIDX_SHIFT)
 
#define FSK_MIDX_12_BY_8   (5 << FSKC0_MIDX_SHIFT)
 
#define FSK_MIDX_14_BY_8   (6 << FSKC0_MIDX_SHIFT)
 
#define FSK_MIDX_16_BY_8   (7 << FSKC0_MIDX_SHIFT)
 
#define FSK_MIDXS_SCALE_7_BY_8   (0 << FSKC0_MIDXS_SHIFT)
 FSK modulation index scale.
 
#define FSK_MIDXS_SCALE_8_BY_8   (1 << FSKC0_MIDXS_SHIFT)
 
#define FSK_MIDXS_SCALE_9_BY_8   (2 << FSKC0_MIDXS_SHIFT)
 
#define FSK_MIDXS_SCALE_10_BY_8   (3 << FSKC0_MIDXS_SHIFT)
 
#define FSK_BT_05   (0 << FSKC0_BT_SHIFT)
 FSK bandwidth time product.
 
#define FSK_BT_10   (1 << FSKC0_BT_SHIFT)
 
#define FSK_BT_15   (2 << FSKC0_BT_SHIFT)
 
#define FSK_BT_20   (3 << FSKC0_BT_SHIFT)
 
#define FSK_SRATE_50K   0x0
 FSK symbol rate (kHz)
 
#define FSK_SRATE_100K   0x1
 
#define FSK_SRATE_150K   0x2
 
#define FSK_SRATE_200K   0x3
 
#define FSK_SRATE_300K   0x4
 
#define FSK_SRATE_400K   0x5
 
#define FSK_CHANNEL_SPACING_200K   0x0
 FSK channel spacing (kHz)
 
#define FSK_CHANNEL_SPACING_400K   0x1
 

Macro Definition Documentation

◆ CMD_RF_RESET

#define CMD_RF_RESET
Value:
0x7 /* transceiver reset, the transceiver state
will automatically end up in state TRXOFF */

Definition at line 465 of file at86rf215_registers.h.

◆ FSKC3_SFDT

#define FSKC3_SFDT (   n)    (((n) << FSKC3_SFDT_SHIFT) & FSKC3_SFDT_MASK)

Lower values increase the SFD detector sensitivity.

Higher values increase the SFD selectivity. The default value 8 is recommended for simultaneous sensing of the SFD pairs according to IEEE 802.15.4g.

Definition at line 606 of file at86rf215_registers.h.

◆ RF_SR_4000K

#define RF_SR_4000K   0x1

The sub-register configures the sampling frequency of the received signal.

Undefined values are mapped to default setting fS=4000kHz

Definition at line 487 of file at86rf215_registers.h.