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atmega_regs_common.h
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/*
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* Copyright (C) 2016 Freie Universität Berlin
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* 2016 INRIA
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* 2017 Thomas Perrot <thomas.perrot@tupi.fr>
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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#ifndef ATMEGA_REGS_COMMON_H
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#define ATMEGA_REGS_COMMON_H
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#include <avr/io.h>
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#include <avr/power.h>
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#ifdef __cplusplus
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extern
"C"
{
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#endif
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#define REG8 volatile uint8_t
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#define REG16 volatile uint16_t
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typedef
struct
{
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REG8
CRA
;
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REG8
CRB
;
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REG8
CRC
;
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REG8
reserved
;
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REG16
CNT
;
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REG16
ICR
;
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REG16
OCR[3];
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}
mega_timer_t
;
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typedef
struct
{
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REG8
CRA
;
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REG8
CRB
;
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REG8
CNT
;
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REG8
OCR[2];
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}
mini_timer_t
;
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typedef
struct
{
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REG8
CSRA
;
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REG8
CSRB
;
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REG8
CSRC
;
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#ifdef CPU_ATMEGA32U4
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REG8
CSRD;
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#else
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REG8
reserved
;
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#endif
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REG16
BRR
;
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REG8
DR
;
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}
mega_uart_t
;
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#if defined(TCCR0A)
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#define MINI_TIMER0 ((mini_timer_t *)(uint16_t *)(&TCCR0A))
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#define MINI_TIMER0_DIV TIMER_DIV1_8_64_128_1024
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#endif
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#if defined(TCCR1A)
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#define MEGA_TIMER1_BASE (uint16_t *)(&TCCR1A)
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#define MEGA_TIMER1 ((mega_timer_t *)MEGA_TIMER1_BASE)
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#endif
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#if defined(TCCR2A)
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#define MINI_TIMER2 ((mini_timer_t *)(uint16_t *)(&TCCR2A))
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#define MINI_TIMER2_DIV TIMER_DIV1_8_32_64_128_256_1024
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#endif
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#if defined(TCCR3A)
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#define MEGA_TIMER3_BASE (uint16_t *)(&TCCR3A)
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#define MEGA_TIMER3 ((mega_timer_t *)MEGA_TIMER3_BASE)
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#endif
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#if defined(TCCR4A)
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#define MEGA_TIMER4_BASE (uint16_t *)(&TCCR4A)
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#define MEGA_TIMER4 ((mega_timer_t *)MEGA_TIMER4_BASE)
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#endif
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#if defined(TCCR5A)
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#define MEGA_TIMER5_BASE (uint16_t *)(&TCCR5A)
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#define MEGA_TIMER5 ((mega_timer_t *)MEGA_TIMER5_BASE)
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#endif
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#if defined(UCSR0A)
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#define MEGA_UART0_BASE ((uint16_t *)(&UCSR0A))
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#define MEGA_UART0 ((mega_uart_t *)MEGA_UART0_BASE)
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#endif
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#if defined(UCSR1A)
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#define MEGA_UART1_BASE ((uint16_t *)(&UCSR1A))
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#define MEGA_UART1 ((mega_uart_t *)MEGA_UART1_BASE)
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#endif
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#if defined(UCSR2A)
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#define MEGA_UART2_BASE ((uint16_t *)(&UCSR2A))
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#define MEGA_UART2 ((mega_uart_t *)MEGA_UART2_BASE)
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#endif
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#if defined(UCSR3A)
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#define MEGA_UART3_BASE ((uint16_t *)(&UCSR3A))
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#define MEGA_UART3 ((mega_uart_t *)MEGA_UART3_BASE)
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#endif
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#ifdef __cplusplus
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}
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#endif
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#endif
/* ATMEGA_REGS_COMMON_H */
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mini_timer_t::CRA
REG8 CRA
control A
Definition:
atmega_regs_common.h:59
mini_timer_t::CNT
REG8 CNT
counter
Definition:
atmega_regs_common.h:61
mega_uart_t
UART register map.
Definition:
atmega_regs_common.h:68
mega_timer_t::ICR
REG16 ICR
input capture
Definition:
atmega_regs_common.h:51
mega_uart_t::BRR
REG16 BRR
baud rate register
Definition:
atmega_regs_common.h:77
REG8
#define REG8
Register types.
Definition:
atmega_regs_common.h:38
mega_timer_t::CRB
REG8 CRB
control B
Definition:
atmega_regs_common.h:47
mini_timer_t
8-bit timer register map
Definition:
atmega_regs_common.h:58
mega_uart_t::CSRB
REG8 CSRB
control and status register B
Definition:
atmega_regs_common.h:70
mega_uart_t::CSRA
REG8 CSRA
control and status register A
Definition:
atmega_regs_common.h:69
mega_timer_t::reserved
REG8 reserved
reserved
Definition:
atmega_regs_common.h:49
mega_timer_t
Timer register map.
Definition:
atmega_regs_common.h:45
REG16
#define REG16
Shortcut to specify 16-bit wide registers.
Definition:
msp430_regs.h:38
mega_uart_t::reserved
REG8 reserved
reserved
Definition:
atmega_regs_common.h:75
mega_timer_t::CNT
REG16 CNT
counter
Definition:
atmega_regs_common.h:50
mega_timer_t::CRA
REG8 CRA
control A
Definition:
atmega_regs_common.h:46
mega_uart_t::DR
REG8 DR
data register
Definition:
atmega_regs_common.h:78
mega_uart_t::CSRC
REG8 CSRC
control and status register C
Definition:
atmega_regs_common.h:71
mini_timer_t::CRB
REG8 CRB
control B
Definition:
atmega_regs_common.h:60
mega_timer_t::CRC
REG8 CRC
control C
Definition:
atmega_regs_common.h:48
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