board_common.h
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1 /*
2  * Copyright (C) 2015 TriaGnoSys GmbH
3  * 2017 Alexander Kurth, Sören Tempel, Tristan Bruns
4  *
5  * This file is subject to the terms and conditions of the GNU Lesser
6  * General Public License v2.1. See the file LICENSE in the top level
7  * directory for more details.
8  */
9 
24 #ifndef BOARD_COMMON_H
25 #define BOARD_COMMON_H
26 
27 #ifdef __cplusplus
28 extern "C" {
29 #endif
30 
35 #ifndef LED0_PORT
36 #define LED0_PORT GPIOC
37 #endif
38 #ifndef LED0_PORTNUM
39 #define LED0_PORTNUM PORT_C
40 #endif
41 #ifndef LED0_PINNUM
42 #define LED0_PINNUM (13)
43 #endif
44 #define LED0_PIN GPIO_PIN(LED0_PORTNUM, LED0_PINNUM)
45 #define LED0_MASK (1 << LED0_PINNUM)
46 
47 #define LED0_ON (LED0_PORT->BSRR = (LED0_MASK << 16))
48 #define LED0_OFF (LED0_PORT->BSRR = LED0_MASK)
49 #define LED0_TOGGLE (LED0_PORT->ODR ^= LED0_MASK)
55 void board_init(void);
56 
60 #define STDIO_UART_DEV UART_DEV(1)
61 
66 #define XTIMER_WIDTH (16)
67 #define XTIMER_BACKOFF (19)
68 
70 /* The boards debug header only exports SWD, so JTAG-only pins PA15, PB3(*),
71  * and PB4 can be remapped as regular GPIOs instead. (Note: PB3 is also used as
72  * SWO. The user needs to take care to not enable SWO with the debugger while
73  * at the same time PB3 is used as GPIO. But RIOT does not use SWO in any case,
74  * so if a user adds this feature in her/his own code, she/he should be well
75  * aware of this.)
76  */
77 #define STM32F1_DISABLE_JTAG
78 #ifdef __cplusplus
79 }
80 #endif
81 
82 #endif /* BOARD_COMMON_H */
83