cfg_clock_default_120.h File Reference
CPU » STM32

Default STM32F2/4/7 clock configuration for 120MHz boards. More...

Detailed Description

Default STM32F2/4/7 clock configuration for 120MHz boards.

Author
Hauke Petersen hauke.nosp@m..pet.nosp@m.ersen.nosp@m.@fu-.nosp@m.berli.nosp@m.n.de
Vincent Dupont vince.nosp@m.nt@o.nosp@m.takey.nosp@m.s.co.nosp@m.m
Alexandre Abadie alexa.nosp@m.ndre.nosp@m..abad.nosp@m.ie@i.nosp@m.nria..nosp@m.fr

Definition in file cfg_clock_default_120.h.

#include "f2f4f7/cfg_clock_common.h"
#include "f2f4f7/cfg_clock_values.h"
+ Include dependency graph for cfg_clock_default_120.h:

Go to the source code of this file.

Clock PLL settings (120MHz)

#define CONFIG_CLOCK_PLL_M   (4)
 
#define CONFIG_CLOCK_PLL_N   (60)
 
#define CONFIG_CLOCK_PLL_P   (2)
 
#define CONFIG_CLOCK_PLL_Q   (5)
 

Clock bus settings (APB1 and APB2)

#define CONFIG_CLOCK_APB1_DIV   (4) /* max 30MHz */
 
#define CONFIG_CLOCK_APB2_DIV   (2) /* max 60MHz */