cfg_clock_default_208.h File Reference
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Default STM32MP1 clock configuration for 208MHz boards. More...

Detailed Description

Default STM32MP1 clock configuration for 208MHz boards.

Author
Gilles DOFFE gille.nosp@m.s.do.nosp@m.ffe@s.nosp@m.avoi.nosp@m.rfair.nosp@m.elin.nosp@m.ux.co.nosp@m.m

Definition in file cfg_clock_default_208.h.

#include "mp1/cfg_clock_common.h"
#include "mp1/cfg_clock_values.h"
+ Include dependency graph for cfg_clock_default_208.h:

Go to the source code of this file.

Clock PLL settings (208MHz)

#define CONFIG_CLOCK_PLL_M   (2)
 
#define CONFIG_CLOCK_PLL_N   (78)
 
#define CONFIG_CLOCK_PLL_P   (3)
 
#define CONFIG_CLOCK_PLL_Q   (13)
 
#define CONFIG_CLOCK_PLL_R   (3)
 

Clock bus settings (MCU, APB1, APB2 and APB3)

#define CONFIG_CLOCK_MCU_DIV   (1) /* max 208MHz */
 
#define CONFIG_CLOCK_APB1_DIV   (2) /* max 104MHz */
 
#define CONFIG_CLOCK_APB2_DIV   (2) /* max 104MHz */
 
#define CONFIG_CLOCK_APB3_DIV   (2) /* max 104MHz */