Default clock configuration for STM32F0. More...

Detailed Description

Default clock configuration for STM32F0.

Author: Hauke Petersen hauke.nosp@m..pet.nosp@m.ersen.nosp@m.@fu-.nosp@m.berli.nosp@m.n.de; José Ignacio Alamos jiala.nosp@m.mos@.nosp@m.uc.cl; Alexandre Abadie alexa.nosp@m.ndre.nosp@m..abad.nosp@m.ie@i.nosp@m.nria..nosp@m.fr

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Clock settings
#define	CONFIG_USE_CLOCK_PLL 1 /* Use PLL by default */

#define	CONFIG_USE_CLOCK_HSE 0

#define	CONFIG_USE_CLOCK_HSI 0

#define	CONFIG_BOARD_HAS_HSE 0

#define	CLOCK_HSE MHZ(8)

#define	CONFIG_BOARD_HAS_LSE 0

#define	CLOCK_HSI MHZ(8)

#define	CONFIG_CLOCK_PLL_PREDIV (1)

#define	CONFIG_CLOCK_PLL_MUL (6)

#define	CLOCK_AHB CLOCK_CORECLOCK /* max: 48MHz */

#define	CONFIG_CLOCK_APB1_DIV (1)

#define	CLOCK_APB1 (CLOCK_AHB / CONFIG_CLOCK_APB1_DIV) /* max: 48MHz */

#define	CLOCK_APB2 (CLOCK_APB1)

Clock settings