cfg_clock_default.h
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1 /*
2  * Copyright (C) 2020 Inria
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser General
5  * Public License v2.1. See the file LICENSE in the top level directory for more
6  * details.
7  */
8 
19 #ifndef CLK_F2F4F7_CFG_CLOCK_DEFAULT_H
20 #define CLK_F2F4F7_CFG_CLOCK_DEFAULT_H
21 
22 #if defined(CPU_FAM_STM32F2)
23 #include "f2f4f7/cfg_clock_default_120.h"
24 #elif defined(CPU_FAM_STM32F4)
25 #if defined(CPU_LINE_STM32F401xC) || defined(CPU_LINE_STM32F401xE)
26 #include "f2f4f7/cfg_clock_default_84.h"
27 #elif defined(CPU_LINE_STM32F410Cx) || defined(CPU_LINE_STM32F410Rx) || \
28  defined(CPU_LINE_STM32F410Tx) || defined(CPU_LINE_STM32F411xE) || \
29  defined(CPU_LINE_STM32F412Cx) || defined(CPU_LINE_STM32F412Rx) || \
30  defined(CPU_LINE_STM32F412Vx) || defined(CPU_LINE_STM32F412Zx) || \
31  defined(CPU_LINE_STM32F413xx) || defined(CPU_LINE_STM32F423xx)
32 #include "f2f4f7/cfg_clock_default_100.h"
33 #elif defined(CPU_LINE_STM32F405xx) || defined(CPU_LINE_STM32F407xx) || \
34  defined(CPU_LINE_STM32F415xx) || defined(CPU_LINE_STM32F417xx) || \
35  defined(CPU_LINE_STM32F427xx) || defined(CPU_LINE_STM32F437xx) || \
36  defined(CPU_LINE_STM32F429xx) || defined(CPU_LINE_STM32F439xx) || \
37  defined(CPU_LINE_STM32F446xx) || defined(CPU_LINE_STM32F469xx) || \
38  defined(CPU_LINE_STM32F479xx)
39 #include "f2f4f7/cfg_clock_default_180.h"
40 #else
41 #error "No clock configuration available for this F4 line"
42 #endif
43 #elif defined(CPU_FAM_STM32F7)
44 #include "f2f4f7/cfg_clock_default_216.h"
45 #else
46 #error "No clock configuration available for this family"
47 #endif
48 
49 #ifdef __cplusplus
50 extern "C" {
51 #endif
52 
53 #ifdef __cplusplus
54 }
55 #endif
56 
57 #endif /* CLK_F2F4F7_CFG_CLOCK_DEFAULT_H */
58 
cfg_clock_default_84.h
Default STM32F4 clock configuration for 84MHz boards.
cfg_clock_default_120.h
Default STM32F2/4/7 clock configuration for 120MHz boards.
cfg_clock_default_216.h
Default STM32F7 clock configuration for 216MHz boards.
cfg_clock_default_180.h
Default STM32F4 clock configuration for 180MHz boards.
cfg_clock_default_100.h
Default STM32F4 clock configuration for 100MHz boards.