Default STM32L0/STM32L1 clock configuration. More...
Default STM32L0/STM32L1 clock configuration.
Definition in file cfg_clock_default.h.
#include "periph_cpu.h"
Go to the source code of this file.
Clock system configuration | |
#define | CONFIG_USE_CLOCK_PLL 1 /* Use PLL by default */ |
#define | CONFIG_USE_CLOCK_MSI 0 |
#define | CONFIG_USE_CLOCK_HSE 0 |
#define | CONFIG_USE_CLOCK_HSI 0 |
#define | CONFIG_BOARD_HAS_HSE 0 |
#define | CLOCK_HSE MHZ(24) |
#define | CONFIG_BOARD_HAS_LSE 0 |
#define | CLOCK_HSI MHZ(16) |
#define | CONFIG_CLOCK_MSI KHZ(4194) |
#define | CONFIG_CLOCK_PLL_DIV (2) |
#define | CONFIG_CLOCK_PLL_MUL (4) |
#define | CLOCK_AHB CLOCK_CORECLOCK /* max: 32MHz */ |
#define | CONFIG_CLOCK_APB1_DIV (1) |
#define | CLOCK_APB1 (CLOCK_CORECLOCK / CONFIG_CLOCK_APB1_DIV) /* max: 32MHz */ |
#define | CONFIG_CLOCK_APB2_DIV (1) |
#define | CLOCK_APB2 (CLOCK_CORECLOCK / CONFIG_CLOCK_APB2_DIV) /* max: 32MHz */ |