Register definitions for the PCA9633 I2C PWM controller. More...
Register definitions for the PCA9633 I2C PWM controller.
Definition in file pca9633_regs.h.
#include "bitarithm.h"
Go to the source code of this file.
#define | PCA9633_REG_MODE1 0x00 |
Mode register 1. | |
#define | PCA9633_REG_MODE2 0x01 |
Mode register 2. | |
#define | PCA9633_REG_PWM0 0x02 |
Brightness control LED0. | |
#define | PCA9633_REG_PWM1 0x03 |
Brightness control LED1. | |
#define | PCA9633_REG_PWM2 0x04 |
Brightness control LED2. | |
#define | PCA9633_REG_PWM3 0x05 |
Brightness control LED3. | |
#define | PCA9633_REG_GRPPWM 0x06 |
Group duty cycle control. | |
#define | PCA9633_REG_GRPFREQ 0x07 |
Group frequency. | |
#define | PCA9633_REG_LEDOUT 0x08 |
LED output state. | |
#define | PCA9633_REG_SUBADR1 0x09 |
I2C-bus subaddress 1. | |
#define | PCA9633_REG_SUBADR2 0x0A |
I2C-bus subaddress 2. | |
#define | PCA9633_REG_SUBADR3 0x0B |
I2C-bus subaddress 3. | |
#define | PCA9633_REG_ALLCALLADR 0x0C |
LED All Call I2C-bus address. | |
#define | PCA9633_BIT_AI2 BIT7 |
Bit for register Auto-Increment 0 = disabled 1 = enabled. | |
#define | PCA9633_BIT_AI1 BIT6 |
Bit for Auto-Increment bit1. | |
#define | PCA9633_BIT_AI0 BIT5 |
Bit for Auto-Increment bit0. | |
#define | PCA9633_BIT_SLEEP BIT4 |
0 = Normal mode 1 = Low power mode. More... | |
#define | PCA9633_BIT_SUB1 BIT3 |
0 = PCA9633 does not respond to I2C-bus subaddress 1 1 = PCA9633 responds to I2C-bus subaddress 1 | |
#define | PCA9633_BIT_SUB2 BIT2 |
0 = PCA9633 does not respond to I2C-bus subaddress 2 1 = PCA9633 responds to I2C-bus subaddress 2 | |
#define | PCA9633_BIT_SUB3 BIT1 |
0 = PCA9633 does not respond to I2C-bus subaddress 3 1 = PCA9633 responds to I2C-bus subaddress 3 | |
#define | PCA9633_BIT_ALLCALL BIT0 |
0 = PCA9633 does not respond to LED All Call I2C-bus address 1 = PCA9633 responds to LED All Call I2C-bus address | |
#define | PCA9633_BIT_DMBLNK BIT5 |
Bit for group control; 0=dimming, 1=blinking. | |
#define | PCA9633_BIT_INVRT BIT4 |
0 = Output logic state not inverted. More... | |
#define | PCA9633_BIT_OCH BIT3 |
0 = Outputs change on STOP command 1 = Outputs change on ACK | |
#define | PCA9633_BIT_OUTDRV BIT2 |
0 = The 4 LED outputs are configured with an open-drain structure 1 = The 4 LED outputs are configured with a totem pole structure | |
#define | PCA9633_BITMASK_OUTNE 0x03 |
00 = When OE = 1 (output drivers not enabled), LEDn = 0. More... | |
#define | PCA9633_BITMASK_LDR3 0xC0 |
Bitmask for LDR3. | |
#define | PCA9633_BITMASK_LDR2 0x30 |
Bitmask for LDR2. | |
#define | PCA9633_BITMASK_LDR1 0x0C |
Bitmask for LDR1. | |
#define | PCA9633_BITMASK_LDR0 0x03 |
Bitmask for LDR0. | |
#define PCA9633_BIT_INVRT BIT4 |
0 = Output logic state not inverted.
Value to use when no external driver used 1 = Output logic state inverted. Value to use when external driver used
Definition at line 158 of file pca9633_regs.h.
#define PCA9633_BIT_SLEEP BIT4 |
#define PCA9633_BITMASK_OUTNE 0x03 |
00 = When OE = 1 (output drivers not enabled), LEDn = 0.
01* = When OE = 1 (output drivers not enabled): LEDn = 1 when OUTDRV = 1 LEDn = high-impedance when OUTDRV = 0 (same as OUTNE[1:0] = 10) 10 When OE = 1 (output drivers not enabled), LEDn = high-impedance. 11 reserved
Definition at line 180 of file pca9633_regs.h.