periph_conf_atmega_common.h
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1 /*
2  * Copyright (C) 2014 Freie Universität Berlin, Hinnerk van Bruinehsen
3  * 2016 Laurent Navet <laurent.navet@gmail.com>
4  * 2016 RWTH Aachen, Josua Arndt
5  * 2016 INRIA, Francisco Acosta
6  * 2017 HAW Hamburg, Dimitri Nahm
7  * 2018 Matthew Blue <matthew.blue.neuro@gmail.com>
8  * 2019 Otto-von-Guericke-Universität Magdeburg
9  *
10  * This file is subject to the terms and conditions of the GNU Lesser
11  * General Public License v2.1. See the file LICENSE in the top level
12  * directory for more details.
13  */
14 
33 #ifndef PERIPH_CONF_ATMEGA_COMMON_H
34 #define PERIPH_CONF_ATMEGA_COMMON_H
35 
36 #include "periph_cpu.h"
37 
38 #ifdef __cplusplus
39 extern "C" {
40 #endif
41 
46 #ifndef CLOCK_CORECLOCK
47 #define CLOCK_CORECLOCK (16000000UL)
48 #endif /* CLOCK_CORECLOCK */
49 
61 #ifndef UART_NUMOF
62 #if defined(CPU_ATMEGA128RFA1) || defined(CPU_ATMEGA256RFR2) || \
63  defined(CPU_ATMEGA1281) || defined(CPU_ATMEGA1284P) || defined(CPU_ATMEGA2560)
64  #define UART_NUMOF (2U)
65 
66  /* UART0 is used for stdio */
67  #define UART_0 MEGA_UART0
68  #define UART_0_ISR USART0_RX_vect
69  #define UART_0_ISR_TX USART0_TX_vect
70 
71  #define UART_1 MEGA_UART1
72  #define UART_1_ISR USART1_RX_vect
73  #define UART_1_ISR_TX USART1_TX_vect
74 #elif defined(CPU_ATMEGA328P)
75  #define UART_NUMOF (1U)
76 
77  #define UART_0 MEGA_UART0
78  #define UART_0_ISR USART_RX_vect
79  #define UART_0_ISR_TX USART_TX_vect
80 #elif defined(CPU_ATMEGA32U4)
81  #define UART_NUMOF (1U)
82 
83  #define UART_0 MEGA_UART1
84  #define UART_0_ISR USART1_RX_vect
85  #define UART_0_ISR_TX USART1_TX_vect
86 #else
87  #define UART_NUMOF (0U)
88 #endif
89 #endif /* UART_NUMOF */
90 
133 #ifndef SPI_NUMOF
134 #define SPI_NUMOF (1U)
135 #endif /* SPI_NUMOF */
136 
142 #ifndef I2C_NUMOF
143 #define I2C_BUS_SPEED I2C_SPEED_FAST
144 #define I2C_NUMOF (1U)
145 #endif /* I2C_NUMOF */
146 
158 #ifndef ADC_NUMOF
159 #if defined(CPU_ATMEGA128RFA1) || defined(CPU_ATMEGA256RFR2) || defined(CPU_ATMEGA328P) || \
160  defined(CPU_ATMEGA1281) || defined(CPU_ATMEGA1284P) || defined(CPU_ATMEGA32U4)
161  #define ADC_NUMOF (8U)
162 #elif defined (CPU_ATMEGA2560)
163  #define ADC_NUMOF (16U)
164 #else
165  #define ADC_NUMOF (0U)
166 #endif
167 #endif /* ADC_NUMOF */
168 
183 #ifndef PWM_NUMOF
184 #if defined(CPU_ATMEGA328P)
185  #define PWM_PINS_CH0 { GPIO_PIN(PORT_D, 6), GPIO_PIN(PORT_D, 5) }
186  #define PWM_PINS_CH1 { GPIO_PIN(PORT_B, 3), GPIO_PIN(PORT_D, 3) }
187 #elif defined(CPU_ATMEGA1281)
188  #define PWM_PINS_CH0 { GPIO_PIN(PORT_B, 7), GPIO_PIN(PORT_G, 5) }
189  #define PWM_PINS_CH1 { GPIO_PIN(PORT_B, 4), GPIO_UNDEF }
190 #elif defined(CPU_ATMEGA1284P)
191  #define PWM_PINS_CH0 { GPIO_PIN(PORT_B, 3), GPIO_PIN(PORT_B, 4) }
192  #define PWM_PINS_CH1 { GPIO_PIN(PORT_D, 7), GPIO_PIN(PORT_D, 6) }
193 #elif defined(CPU_ATMEGA2560)
194  #define PWM_PINS_CH0 { GPIO_PIN(PORT_B, 7), GPIO_PIN(PORT_G, 5) }
195  #define PWM_PINS_CH1 { GPIO_PIN(PORT_B, 4), GPIO_PIN(PORT_H, 6) }
196 #elif defined(CPU_ATMEGA32U4)
197  #define PWM_PINS_CH0 { GPIO_PIN(PORT_B, 7), GPIO_PIN(PORT_D, 0) }
198 #else
199  #define PWM_NUMOF (0U)
200 #endif
201 
202 #if defined(CPU_ATMEGA32U4) || defined(CPU_ATMEGA328P) || \
203  defined(CPU_ATMEGA1281) || defined(CPU_ATMEGA1284P) || \
204  defined(CPU_ATMEGA2560)
205  static const pwm_conf_t pwm_conf[] = {
206  {
207  .dev = MINI_TIMER0,
208  .pin_ch = PWM_PINS_CH0,
209  .div = MINI_TIMER0_DIV,
210  },
211 #ifndef CPU_ATMEGA32U4
212  {
213  .dev = MINI_TIMER2,
214  .pin_ch = PWM_PINS_CH1,
215  .div = MINI_TIMER2_DIV,
216  }
217 #endif
218  };
219 
220  #define PWM_NUMOF ARRAY_SIZE(pwm_conf)
221 #endif
222 #endif /* PWM_NUMOF */
223 
225 #ifdef __cplusplus
226 }
227 #endif
228 
229 #endif /* PERIPH_CONF_ATMEGA_COMMON_H */
pwm_conf_t::dev
mini_timer_t * dev
Timer used.
Definition: periph_cpu_common.h:154
pwm_conf_t
PWM device configuration.
Definition: periph_cpu_common.h:153