cfg_spi_default.h
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1 /*
2  * Copyright (C) 2014-2016 Freie Universität Berlin
3  * 2015 Zolertia SL
4  *
5  * This file is subject to the terms and conditions of the GNU Lesser
6  * General Public License v2.1. See the file LICENSE in the top level
7  * directory for more details.
8  */
9 
22 #ifndef CFG_SPI_DEFAULT_H
23 #define CFG_SPI_DEFAULT_H
24 
25 #include "periph_cpu.h"
26 
27 #ifdef __cplusplus
28 extern "C" {
29 #endif
30 
35 static const spi_conf_t spi_config[] = {
36  {
37  .num = 0,
38  .mosi_pin = GPIO_PIN(PORT_B, 1),
39  .miso_pin = GPIO_PIN(PORT_B, 3),
40  .sck_pin = GPIO_PIN(PORT_B, 2),
41  .cs_pin = GPIO_PIN(PORT_B, 5)
42  },
43  {
44  .num = 1,
45  .mosi_pin = GPIO_PIN(PORT_C, 5),
46  .miso_pin = GPIO_PIN(PORT_C, 6),
47  .sck_pin = GPIO_PIN(PORT_C, 4),
48  .cs_pin = GPIO_PIN(PORT_A, 7)
49  }
50 };
51 
52 #define SPI_NUMOF ARRAY_SIZE(spi_config)
53 
55 #ifdef __cplusplus
56 } /* end extern "C" */
57 #endif
58 
59 #endif /* CFG_SPI_DEFAULT_H */
60 
PORT_C
@ PORT_C
port C
Definition: periph_cpu.h:38
PORT_A
@ PORT_A
port A
Definition: periph_cpu.h:36
spi_conf_t::num
uint8_t num
number of SSI device, i.e.
Definition: periph_cpu.h:274
GPIO_PIN
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:35
PORT_B
@ PORT_B
port B
Definition: periph_cpu.h:37
spi_conf_t
SPI configuration structure type.
Definition: periph_cpu.h:273