CPU specific definitions for internal peripheral handling. More...
CPU specific definitions for internal peripheral handling.
Definition in file periph_cpu.h.
#include "cpu.h"
Go to the source code of this file.
Data Structures | |
struct | timer_conf_t |
Timer configuration. More... | |
struct | uart_conf_t |
UART device configuration. More... | |
struct | pwm_chan_conf_t |
PWM channel configuration. More... | |
struct | spi_conf_t |
SPI configuration structure type. More... | |
Macros | |
#define | GPIO_UNDEF (0xffffffff) |
Definition of a fitting UNDEF value. | |
#define | GPIO_PIN(x, y) (((uint32_t)PIOA + (x << 9)) | y) |
Define a CPU specific GPIO pin generator macro. | |
#define | CPUID_LEN (16U) |
Length of the CPU_ID in octets. | |
#define | TIMER_MAX_VAL (0xffffffff) |
All SAM3 timers are 32-bit wide. | |
#define | TIMER_CHANNEL_NUMOF (1) |
We use one channel for each defined timer. More... | |
#define | RTT_MAX_VALUE (0xffffffff) |
The RTT width is fixed to 32-bit. | |
#define | GPIO_MODE(io, pu, od) (io | (pu << 1) | (od << 2)) |
Generate GPIO mode bitfields. More... | |
#define | HAVE_GPIO_T |
Overwrite the default gpio_t type definition. | |
typedef uint32_t | gpio_t |
#define | PERIPH_SPI_NEEDS_INIT_CS |
Declare needed generic SPI functions. | |
#define | PERIPH_SPI_NEEDS_TRANSFER_BYTE |
#define | PERIPH_SPI_NEEDS_TRANSFER_REG |
#define | PERIPH_SPI_NEEDS_TRANSFER_REGS |
ADC configuration, valid for all boards using this CPU | |
The sam3 has a fixed mapping of ADC pins and a fixed number of ADC channels, so this ADC configuration is valid for all boards using this CPU. No need for any board specific configuration. | |
#define | ADC_NUMOF (16U) |
#define | DAC_NUMOF (2U) |
DAC configuration, valid for all boards using this CPU. More... | |
enum | { PA = 0, PB = 1, PC = 2, PD = 3 } |
Available ports on the SAM3X8E. More... | |
enum | gpio_mux_t { GPIO_MUX_A = 0x0, GPIO_MUX_B = 0x1, GPIO_MUX_C = 0x2, GPIO_MUX_D = 0x3, GPIO_MUX_E = 0x4, GPIO_MUX_F = 0x5, GPIO_MUX_G = 0x6, GPIO_MUX_H = 0x7, GPIO_MUX_A = 0, GPIO_MUX_B = 1 } |
GPIO mux configuration. More... | |
void | gpio_init_mux (gpio_t pin, gpio_mux_t mux) |
Configure the given GPIO pin to be used with the given MUX setting. More... | |
#define DAC_NUMOF (2U) |
DAC configuration, valid for all boards using this CPU.
The sam3 has a fixed mapping of DAC pins and a fixed number of DAC channels, so this DAC configuration is valid for all boards using this CPU. No need for any board specific configuration.
The sam3's DAC channels are mapped to the following fixed pins:
Definition at line 113 of file periph_cpu.h.
#define GPIO_MODE | ( | io, | |
pu, | |||
od | |||
) | (io | (pu << 1) | (od << 2)) |
Generate GPIO mode bitfields.
We use 3 bit to determine the pin functions:
Definition at line 91 of file periph_cpu.h.
#define TIMER_CHANNEL_NUMOF (1) |
We use one channel for each defined timer.
While the peripheral provides three channels, the current interrupt flag handling leads to a race condition where calling timer_clear() on one channel can disable a pending flag for other channels. Until resolved, limit the peripheral to only one channel.
Definition at line 76 of file periph_cpu.h.
anonymous enum |
Available ports on the SAM3X8E.
Enumerator | |
---|---|
PA | port A |
PB | port B |
PC | port C |
PD | port D |
Definition at line 147 of file periph_cpu.h.
enum gpio_mux_t |
GPIO mux configuration.
Definition at line 157 of file periph_cpu.h.
void gpio_init_mux | ( | gpio_t | pin, |
gpio_mux_t | mux | ||
) |
Configure the given GPIO pin to be used with the given MUX setting.
[in] | pin | GPIO pin to configure |
[in] | mux | MUX setting to use |