periph_cpu.h

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/*
 * Copyright (C) 2015-2016 Freie Universität Berlin
 *
 * This file is subject to the terms and conditions of the GNU Lesser
 * General Public License v2.1. See the file LICENSE in the top level
 * directory for more details.
 */
 
#ifndef PERIPH_CPU_H
#define PERIPH_CPU_H
 
#include <limits.h>
 
#include "periph_cpu_common.h"
 
#ifdef __cplusplus
extern "C" {
#endif
 
#define PM_NUM_MODES        (3)
 
#define PM_BLOCKER_INITIAL      0x00000001
 
#define SAMD21_PM_STANDBY       (0U)    
#define SAMD21_PM_IDLE_2        (1U)    
#define SAMD21_PM_IDLE_1        (2U)    
#define SAMD21_PM_IDLE_0        (3U)    
enum {
    SAM0_GCLK_MAIN = 0,                 
    SAM0_GCLK_1MHZ,                     
    SAM0_GCLK_32KHZ,                    
    SAM0_GCLK_1KHZ,                     
    SAM0_GCLK_DISABLED = 0xF,           
};
#define SPI_HWCS(x)     (UINT_MAX - 1)
 
static inline int _sercom_id(SercomUsart *sercom)
{
    return ((((uint32_t)sercom) >> 10) & 0x7) - 2;
}
 
#ifndef DOXYGEN
 
#define HAVE_ADC_RES_T
typedef enum {
    ADC_RES_6BIT  = 0xff,                       
    ADC_RES_8BIT  = ADC_CTRLB_RESSEL_8BIT,      
    ADC_RES_10BIT = ADC_CTRLB_RESSEL_10BIT,     
    ADC_RES_12BIT = ADC_CTRLB_RESSEL_12BIT,     
    ADC_RES_14BIT = 0xfe,                       
    ADC_RES_16BIT = 0xfd                        
} adc_res_t;
#endif /* ndef DOXYGEN */
 
#define DAC_RES_BITS        (10)
 
#define DAC_NUMOF           (1)
 
#define RTT_RUNSTDBY        (1)         /* Keep RTT running in sleep states */
 
#define RTT_MAX_VALUE       (0xffffffff)
#define RTT_CLOCK_FREQUENCY (32768U)                      /* in Hz */
#define RTT_MIN_FREQUENCY   (RTT_CLOCK_FREQUENCY / 1024U) /* in Hz */
#define RTT_MAX_FREQUENCY   (RTT_CLOCK_FREQUENCY)         /* in Hz */
 
struct sam0_aux_cfg_mapping {
    uint64_t bootloader_size            :  3; 
    uint64_t reserved_0                 :  1; 
    uint64_t eeprom_size                :  3; 
    uint64_t reserved_1                 :  1; 
    uint64_t bod33_level                :  6; 
    uint64_t bod33_enable               :  1; 
    uint64_t bod33_action               :  2; 
    uint64_t reserved_2                 :  8; 
    uint64_t wdt_enable                 :  1; 
    uint64_t wdt_always_on              :  1; 
    uint64_t wdt_period                 :  4; 
    uint64_t wdt_window                 :  4; 
    uint64_t wdt_ewoffset               :  4; 
    uint64_t wdt_window_enable          :  1; 
    uint64_t bod33_hysteresis           :  1; 
    const uint64_t bod12_calibration    :  1; 
    uint64_t reserved_3                 :  6; 
    uint64_t nvm_locks                  : 16; 
};
#ifdef __cplusplus
}
#endif
 
#endif /* PERIPH_CPU_H */