Interface for configuring the clock tree of STM32 CPUs. More...

Detailed Description

Interface for configuring the clock tree of STM32 CPUs.

Todo:: This interface should probably be moved and implemented for every STM32 CPU

Author: Hauke Petersen hauke.nosp@m..per.nosp@m.terse.nosp@m.n@fu.nosp@m.-berl.nosp@m.in.d.nosp@m.e

Definition in file stmclk.h.

void	stmclk_init_sysclk (void)
	Configure the high speed clock domain (main system clock) More...

void	stmclk_enable_hsi (void)
	Enable the internal high speed clock (HSI)

void	stmclk_disable_hsi (void)
	Disable the internal high speed clock (HSI) More...

void	stmclk_enable_lfclk (void)
	Configure and enable the low speed clock domain. More...

void	stmclk_disable_lfclk (void)
	Disable the low frequency clock domain. More...

void	stmclk_dbp_unlock (void)
	Unlock write access to the backup domain control.

void	stmclk_dbp_lock (void)
	Lock write access to backup control domain.

Function Documentation

◆ stmclk_disable_hsi()

void stmclk_disable_hsi ( void )

Disable the internal high speed clock (HSI)

Note: The HSI is only disabled, if it is at that point not used to drive the system clock or the PLL

◆ stmclk_disable_lfclk()

void stmclk_disable_lfclk ( void )

Disable the low frequency clock domain.

Note: When calling this function, better know what you do: be sure that the clock is not needed by any peripheral before calling this function.

◆ stmclk_enable_lfclk()

void stmclk_enable_lfclk ( void )

Configure and enable the low speed clock domain.

The actual clock used as input for the low frequency clock can be either the external low speed clock (LSE) or the internal low speed clock (LSI). This is configured in the board's periph_conf.h file.

◆ stmclk_init_sysclk()

void stmclk_init_sysclk ( void )

Configure the high speed clock domain (main system clock)

This function initializes and configures the main systems clock(s). For this, the following actions are carried out:

enable the HSI
use the HSI as system clock (so now we are always in a defined state)
configure flash wait states and AHB/APB bus dividers
[opt] enable the HSE / MSI
configure the PLL
use PLL as system clock
turn off the HSI if unused

All of these options are configurable through the board's periph_conf.h