Data Fields
fcfg_regs_t Struct Reference

FCFG registers. More...

Detailed Description

FCFG registers.

Definition at line 34 of file cc26x0_fcfg.h.

#include <cc26x0_fcfg.h>

Data Fields

uint8_t __reserved1 [0xA0]
 meh
 
reg32_t MISC_CONF_1
 misc config
 
reg32_t __reserved2 [8]
 meh More...
 
reg32_t CONFIG_RF_FRONTEND_DIV5
 config of RF frontend in divide-by-5 mode
 
reg32_t CONFIG_RF_FRONTEND_DIV6
 config of RF frontend in divide-by-6 mode
 
reg32_t CONFIG_RF_FRONTEND_DIV10
 config of RF frontend in divide-by-10 mode
 
reg32_t CONFIG_RF_FRONTEND_DIV12
 config of RF frontend in divide-by-12 mode
 
reg32_t CONFIG_RF_FRONTEND_DIV15
 config of RF frontend in divide-by-15 mode
 
reg32_t CONFIG_RF_FRONTEND_DIV30
 config of RF frontend in divide-by-30 mode
 
reg32_t CONFIG_SYNTH_DIV5
 config of synthesizer in divide-by-5-mode More...
 
reg32_t CONFIG_SYNTH_DIV6
 config of synthesizer in divide-by-5-mode
 
reg32_t CONFIG_SYNTH_DIV10
 config of synthesizer in divide-by-10-mode More...
 
reg32_t CONFIG_SYNTH_DIV12
 config of synthesizer in divide-by-12-mode
 
reg32_t CONFIG_SYNTH_DIV15
 config of synthesizer in divide-by-15-mode More...
 
reg32_t CONFIG_SYNTH_DIV30
 config of synthesizer in divide-by-30-mode More...
 
reg32_t CONFIG_MISC_ADC_DIV5
 config of IFADC in divide-by-5-mode
 
reg32_t CONFIG_MISC_ADC_DIV6
 config of IFADC in divide-by-6-mode
 
reg32_t CONFIG_MISC_ADC_DIV10
 config of IFADC in divide-by-10-mode
 
reg32_t CONFIG_MISC_ADC_DIV12
 config of IFADC in divide-by-12-mode
 
reg32_t CONFIG_MISC_ADC_DIV15
 config of IFADC in divide-by-15-mode
 
reg32_t CONFIG_MISC_ADC_DIV30
 config of IFADC in divide-by-30-mode
 
reg32_t __reserved3 [3]
 meh More...
 
reg32_t SHDW_DIE_ID_0
 shadow of JTAG_TAP::EFUSE::DIE_ID_0. More...
 
reg32_t SHDW_DIE_ID_1
 shadow of JTAG_TAP::EFUSE::DIE_ID_1. More...
 
reg32_t SHDW_DIE_ID_2
 shadow of JTAG_TAP::EFUSE::DIE_ID_2. More...
 
reg32_t SHDW_DIE_ID_3
 shadow of JTAG_TAP::EFUSE::DIE_ID_3. More...
 
reg32_t __reserved4 [4]
 meh More...
 
reg32_t SHDW_OSC_BIAS_LDO_TRIM
 shadow of JTAG_TAP::EFUSE::BIAS_LDO_TIM. More...
 
reg32_t SHDW_ANA_TRIM
 shadow of JTAG_TAP::EFUSE::ANA_TIM. More...
 
reg32_t __reserved5 [9]
 meh More...
 
reg32_t FLASH_NUMBER
 number of manufactoring lot that produced this unit More...
 
reg32_t FLASH_COORDINATE
 X and Y coordinates of this unit on the wafer. More...
 
reg32_t FLASH_E_P
 flash erase and program setup time More...
 
reg32_t FLASH_C_E_P_R
 flash compaction, execute, program, and read More...
 
reg32_t FLASH_P_R_PV
 flash program, read, and program verify More...
 
reg32_t FLASH_EH_SEQ
 flash erase hold and sequence More...
 
reg32_t FLASH_VHV_E
 flash VHV erase More...
 
reg32_t FLASH_PP
 flash program pulse More...
 
reg32_t FLASH_PROG_EP
 flash program and erase pulse More...
 
reg32_t FLASH_ERA_PW
 flash erase pulse width More...
 
reg32_t FLASH_VHV
 flash VHV More...
 
reg32_t FLASH_VHV_PV
 flash VHV program verify More...
 
reg32_t FLASH_V
 flash voltages More...
 
reg32_t __reserved6 [0x3E]
 meh More...
 
reg32_t USER_ID
 user identification
 
reg32_t __reserved7 [6]
 meh More...
 
reg32_t FLASH_OTP_DATA3
 flash OTP data 3 More...
 
reg32_t ANA2_TRIM
 misc analog trim More...
 
reg32_t LDO_TRIM
 LDO trim. More...
 
reg32_t __reserved8 [0xB]
 meh More...
 
reg32_t MAC_BLE_0
 MAC BLE address 0.
 
reg32_t MAC_BLE_1
 MAC BLE address 1.
 
reg32_t MAC_15_4_0
 MAC IEEE 820.15.4 address 0. More...
 
reg32_t MAC_15_4_1
 MAC IEEE 820.15.4 address 1. More...
 
reg32_t __reserved9 [4]
 meh More...
 
reg32_t FLASH_OTP_DATA4
 flash OTP data 4 More...
 
reg32_t MISC_TRIM
 misc trim parameters More...
 
reg32_t RCOSC_HF_TEMPCOMP
 RFOSC HF temperature compensation. More...
 
reg32_t __reserved10
 meh More...
 
reg32_t ICEPICK_DEVICE_ID
 IcePick device identification. More...
 
reg32_t FCFG1_REVISION
 FCFG1 revision. More...
 
reg32_t MISC_OTP_DATA
 misc OTP data More...
 
reg32_t __reserved11 [8]
 meh More...
 
reg32_t IOCONF
 IO config. More...
 
reg32_t __reserved12
 meh More...
 
reg32_t CONFIG_IF_ADC
 config of IF_ADC More...
 
reg32_t CONFIG_OSC_TOP
 config of OSC More...
 
reg32_t CONFIG_RF_FRONTEND
 config of RF frontend in dividy-by-2-mode
 
reg32_t CONFIG_SYNTH
 config of synthesizer in dividy-by-2-mode
 
reg32_t SOC_ADC_ABS_GAIN
 AUX_ADC gain in absolute reference mode.
 
reg32_t SOC_ADC_REL_GAIN
 AUX_ADC gain in relative reference mode.
 
reg32_t __reserved13
 meh More...
 
reg32_t SOC_ADC_OFFSET_INT
 AUX_ADC temperature offsets in absolute reference mode.
 
reg32_t SOC_ADC_REF_TRIM_AND_OFFSET_EXT
 AUX_ADC reference trim and offset of external reference mode. More...
 
reg32_t AMPCOMP_TH1
 amplitude compensation threshold 1 More...
 
reg32_t AMPCOMP_TH2
 amplitude compensation threshold 2 More...
 
reg32_t AMPCOMP_CTRL1
 amplitude compensation control More...
 
reg32_t ANABYPASS_VALUE2
 analog bypass value for OSC More...
 
reg32_t CONFIG_MISC_ADC
 config of IFADC in divide-by-2-mode
 
reg32_t __reserved14
 meh More...
 
reg32_t VOLT_TRIM
 voltage trim More...
 
reg32_t OSC_CONF
 OSC configuration.
 
reg32_t __reserved15
 meh More...
 
reg32_t CAP_TRIM
 capacitor trim (it says 'capasitor' in the manual - if you know what that is ;-)
 
reg32_t MISC_OTP_DATA_1
 misc OSC control More...
 
reg32_t PWD_CURR_20C
 power down current control 20C
 
reg32_t PWD_CURR_35C
 power down current control 35C
 
reg32_t PWD_CURR_50C
 power down current control 50C
 
reg32_t PWD_CURR_65C
 power down current control 65C
 
reg32_t PWD_CURR_80C
 power down current control 80C
 
reg32_t PWD_CURR_95C
 power down current control 95C
 
reg32_t PWD_CURR_110C
 power down current control 110C
 
reg32_t PWD_CURR_125C
 power down current control 125C
 
reg8_t __reserved1 [0xA0]
 Reserved.
 
reg32_t MISC_CONF_2
 misc config
 
reg32_t HPOSC_MEAS_5
 Internal.
 
reg32_t HPOSC_MEAS_4
 Internal.
 
reg32_t HPOSC_MEAS_3
 Internal.
 
reg32_t HPOSC_MEAS_2
 Internal.
 
reg32_t HPOSC_MEAS_1
 Internal.
 
reg32_t CONFIG_FE_CC26
 Internal.
 
reg32_t CONFIG_FE_CC13
 Internal.
 
reg32_t CONFIG_RF_COMMON
 Internal.
 
reg32_t CONFIG_SYNTH_DIV2_CC26_2G4
 Config of synthesizer in divide-by-2-mode.
 
reg32_t CONFIG_SYNTH_DIV2_CC13_2G4
 Config of synthesizer in divide-by-2-mode.
 
reg32_t CONFIG_SYNTH_DIV2_CC26_1G
 Config of synthesizer in divide-by-2-mode.
 
reg32_t CONFIG_SYNTH_DIV2_CC13_1G
 Config of synthesizer in divide-by-2-mode.
 
reg32_t CONFIG_SYNTH_DIV4_CC26
 Config of synthesizer in divide-by-4-mode.
 
reg32_t CONFIG_SYNTH_DIV4_CC13
 Config of synthesizer in divide-by-4-mode.
 
reg32_t CONFIG_SYNTH_DIV6_CC26
 Config of synthesizer in divide-by-5-mode.
 
reg32_t CONFIG_SYNTH_DIV6_CC13
 Config of synthesizer in divide-by-5-mode.
 
reg32_t CONFIG_SYNTH_DIV12_CC26
 Config of synthesizer in divide-by-12-mode.
 
reg32_t CONFIG_SYNTH_DIV12_CC13
 Config of synthesizer in divide-by-12-mode.
 
reg32_t FREQ_OFFSET
 Internal.
 
reg32_t __reserved16 [0xC]
 Reserved.
 
reg32_t __reserved17 [0x7]
 Reserved.
 
reg32_t __reserved18 [0x3]
 Reserved.
 
reg32_t DAC_BIAS_CNF
 Internal.
 
reg32_t __reserved19 [0x2]
 Reserved.
 
reg32_t TFW_PROBE
 Internal.
 
reg32_t TFW_FT
 Internal.
 
reg32_t DAC_CAL0
 Internal.
 
reg32_t DAC_CAL1
 Internal.
 
reg32_t DAC_CAL2
 Internal.
 
reg32_t DAC_CAL3
 Internal.
 

Field Documentation

◆ __reserved10

reg32_t fcfg_regs_t::__reserved10

meh

Reserved.

Definition at line 94 of file cc26x0_fcfg.h.

◆ __reserved11

reg32_t fcfg_regs_t::__reserved11

meh

Reserved.

Definition at line 98 of file cc26x0_fcfg.h.

◆ __reserved12

reg32_t fcfg_regs_t::__reserved12

meh

Reserved.

Definition at line 100 of file cc26x0_fcfg.h.

◆ __reserved13

reg32_t fcfg_regs_t::__reserved13

meh

Reserved.

Definition at line 107 of file cc26x0_fcfg.h.

◆ __reserved14

reg32_t fcfg_regs_t::__reserved14

meh

Reserved.

Definition at line 115 of file cc26x0_fcfg.h.

◆ __reserved15

reg32_t fcfg_regs_t::__reserved15

meh

Reserved.

Definition at line 118 of file cc26x0_fcfg.h.

◆ __reserved2

reg32_t fcfg_regs_t::__reserved2

meh

Reserved.

Definition at line 38 of file cc26x0_fcfg.h.

◆ __reserved3

reg32_t fcfg_regs_t::__reserved3

meh

Reserved.

Definition at line 57 of file cc26x0_fcfg.h.

◆ __reserved4

reg32_t fcfg_regs_t::__reserved4

meh

Reserved.

Definition at line 62 of file cc26x0_fcfg.h.

◆ __reserved5

reg32_t fcfg_regs_t::__reserved5

meh

Reserved.

Definition at line 65 of file cc26x0_fcfg.h.

◆ __reserved6

reg32_t fcfg_regs_t::__reserved6

meh

Reserved.

Definition at line 79 of file cc26x0_fcfg.h.

◆ __reserved7

reg32_t fcfg_regs_t::__reserved7

meh

Reserved.

Definition at line 81 of file cc26x0_fcfg.h.

◆ __reserved8

reg32_t fcfg_regs_t::__reserved8

meh

Reserved.

Definition at line 85 of file cc26x0_fcfg.h.

◆ __reserved9

reg32_t fcfg_regs_t::__reserved9

meh

Reserved.

Definition at line 90 of file cc26x0_fcfg.h.

◆ AMPCOMP_CTRL1

reg32_t fcfg_regs_t::AMPCOMP_CTRL1

amplitude compensation control

Internal.

Definition at line 112 of file cc26x0_fcfg.h.

◆ AMPCOMP_TH1

reg32_t fcfg_regs_t::AMPCOMP_TH1

amplitude compensation threshold 1

Internal.

Definition at line 110 of file cc26x0_fcfg.h.

◆ AMPCOMP_TH2

reg32_t fcfg_regs_t::AMPCOMP_TH2

amplitude compensation threshold 2

Internal.

Definition at line 111 of file cc26x0_fcfg.h.

◆ ANA2_TRIM

reg32_t fcfg_regs_t::ANA2_TRIM

misc analog trim

Internal.

Definition at line 83 of file cc26x0_fcfg.h.

◆ ANABYPASS_VALUE2

reg32_t fcfg_regs_t::ANABYPASS_VALUE2

analog bypass value for OSC

Internal.

Definition at line 113 of file cc26x0_fcfg.h.

◆ CONFIG_IF_ADC

reg32_t fcfg_regs_t::CONFIG_IF_ADC

config of IF_ADC

Internal.

Definition at line 101 of file cc26x0_fcfg.h.

◆ CONFIG_OSC_TOP

reg32_t fcfg_regs_t::CONFIG_OSC_TOP

config of OSC

Internal.

Definition at line 102 of file cc26x0_fcfg.h.

◆ CONFIG_SYNTH_DIV10

reg32_t fcfg_regs_t::CONFIG_SYNTH_DIV10

config of synthesizer in divide-by-10-mode

Config of synthesizer in divide-by-10-mode.

Definition at line 47 of file cc26x0_fcfg.h.

◆ CONFIG_SYNTH_DIV15

reg32_t fcfg_regs_t::CONFIG_SYNTH_DIV15

config of synthesizer in divide-by-15-mode

Config of synthesizer in divide-by-15-mode.

Definition at line 49 of file cc26x0_fcfg.h.

◆ CONFIG_SYNTH_DIV30

reg32_t fcfg_regs_t::CONFIG_SYNTH_DIV30

config of synthesizer in divide-by-30-mode

Config of synthesizer in divide-by-30-mode.

Definition at line 50 of file cc26x0_fcfg.h.

◆ CONFIG_SYNTH_DIV5

reg32_t fcfg_regs_t::CONFIG_SYNTH_DIV5

config of synthesizer in divide-by-5-mode

Config of synthesizer in divide-by-5-mode.

Definition at line 45 of file cc26x0_fcfg.h.

◆ FCFG1_REVISION

reg32_t fcfg_regs_t::FCFG1_REVISION

FCFG1 revision.

Factory configuration revision.

Definition at line 96 of file cc26x0_fcfg.h.

◆ FLASH_C_E_P_R

reg32_t fcfg_regs_t::FLASH_C_E_P_R

flash compaction, execute, program, and read

Internal.

Definition at line 69 of file cc26x0_fcfg.h.

◆ FLASH_COORDINATE

reg32_t fcfg_regs_t::FLASH_COORDINATE

X and Y coordinates of this unit on the wafer.

Chip coordinates on a wafer.

Definition at line 67 of file cc26x0_fcfg.h.

◆ FLASH_E_P

reg32_t fcfg_regs_t::FLASH_E_P

flash erase and program setup time

Internal.

Definition at line 68 of file cc26x0_fcfg.h.

◆ FLASH_EH_SEQ

reg32_t fcfg_regs_t::FLASH_EH_SEQ

flash erase hold and sequence

Internal.

Definition at line 71 of file cc26x0_fcfg.h.

◆ FLASH_ERA_PW

reg32_t fcfg_regs_t::FLASH_ERA_PW

flash erase pulse width

Internal.

Definition at line 75 of file cc26x0_fcfg.h.

◆ FLASH_NUMBER

reg32_t fcfg_regs_t::FLASH_NUMBER

number of manufactoring lot that produced this unit

Manufacturing lot number.

Definition at line 66 of file cc26x0_fcfg.h.

◆ FLASH_OTP_DATA3

reg32_t fcfg_regs_t::FLASH_OTP_DATA3

flash OTP data 3

Internal.

Definition at line 82 of file cc26x0_fcfg.h.

◆ FLASH_OTP_DATA4

reg32_t fcfg_regs_t::FLASH_OTP_DATA4

flash OTP data 4

Internal.

Definition at line 91 of file cc26x0_fcfg.h.

◆ FLASH_P_R_PV

reg32_t fcfg_regs_t::FLASH_P_R_PV

flash program, read, and program verify

Internal.

Definition at line 70 of file cc26x0_fcfg.h.

◆ FLASH_PP

reg32_t fcfg_regs_t::FLASH_PP

flash program pulse

Internal.

Definition at line 73 of file cc26x0_fcfg.h.

◆ FLASH_PROG_EP

reg32_t fcfg_regs_t::FLASH_PROG_EP

flash program and erase pulse

Internal.

Definition at line 74 of file cc26x0_fcfg.h.

◆ FLASH_V

reg32_t fcfg_regs_t::FLASH_V

flash voltages

Internal.

Definition at line 78 of file cc26x0_fcfg.h.

◆ FLASH_VHV

reg32_t fcfg_regs_t::FLASH_VHV

flash VHV

Internal.

Definition at line 76 of file cc26x0_fcfg.h.

◆ FLASH_VHV_E

reg32_t fcfg_regs_t::FLASH_VHV_E

flash VHV erase

Internal.

Definition at line 72 of file cc26x0_fcfg.h.

◆ FLASH_VHV_PV

reg32_t fcfg_regs_t::FLASH_VHV_PV

flash VHV program verify

Internal.

Definition at line 77 of file cc26x0_fcfg.h.

◆ ICEPICK_DEVICE_ID

reg32_t fcfg_regs_t::ICEPICK_DEVICE_ID

IcePick device identification.

IcePick Device Identification.

Definition at line 95 of file cc26x0_fcfg.h.

◆ IOCONF

reg32_t fcfg_regs_t::IOCONF

IO config.

I/O Configuration.

Definition at line 99 of file cc26x0_fcfg.h.

◆ LDO_TRIM

reg32_t fcfg_regs_t::LDO_TRIM

LDO trim.

Internal.

Definition at line 84 of file cc26x0_fcfg.h.

◆ MAC_15_4_0

reg32_t fcfg_regs_t::MAC_15_4_0

MAC IEEE 820.15.4 address 0.

MAC IEEE 802.15.4 address 0.

Definition at line 88 of file cc26x0_fcfg.h.

◆ MAC_15_4_1

reg32_t fcfg_regs_t::MAC_15_4_1

MAC IEEE 820.15.4 address 1.

MAC IEEE 802.15.4 address 1.

Definition at line 89 of file cc26x0_fcfg.h.

◆ MISC_OTP_DATA

reg32_t fcfg_regs_t::MISC_OTP_DATA

misc OTP data

Miscelanous OTP data.

Definition at line 97 of file cc26x0_fcfg.h.

◆ MISC_OTP_DATA_1

reg32_t fcfg_regs_t::MISC_OTP_DATA_1

misc OSC control

Internal.

Definition at line 120 of file cc26x0_fcfg.h.

◆ MISC_TRIM

reg32_t fcfg_regs_t::MISC_TRIM

misc trim parameters

Miscellaneous trim parameters.

Definition at line 92 of file cc26x0_fcfg.h.

◆ RCOSC_HF_TEMPCOMP

reg32_t fcfg_regs_t::RCOSC_HF_TEMPCOMP

RFOSC HF temperature compensation.

Internal.

Definition at line 93 of file cc26x0_fcfg.h.

◆ SHDW_ANA_TRIM

reg32_t fcfg_regs_t::SHDW_ANA_TRIM

shadow of JTAG_TAP::EFUSE::ANA_TIM.

Internal.

Definition at line 64 of file cc26x0_fcfg.h.

◆ SHDW_DIE_ID_0

reg32_t fcfg_regs_t::SHDW_DIE_ID_0

shadow of JTAG_TAP::EFUSE::DIE_ID_0.

Shadow of JTAG_TAP::EFUSE::DIE_ID_0.

Definition at line 58 of file cc26x0_fcfg.h.

◆ SHDW_DIE_ID_1

reg32_t fcfg_regs_t::SHDW_DIE_ID_1

shadow of JTAG_TAP::EFUSE::DIE_ID_1.

Shadow of JTAG_TAP::EFUSE::DIE_ID_1.

Definition at line 59 of file cc26x0_fcfg.h.

◆ SHDW_DIE_ID_2

reg32_t fcfg_regs_t::SHDW_DIE_ID_2

shadow of JTAG_TAP::EFUSE::DIE_ID_2.

Shadow of JTAG_TAP::EFUSE::DIE_ID_2.

Definition at line 60 of file cc26x0_fcfg.h.

◆ SHDW_DIE_ID_3

reg32_t fcfg_regs_t::SHDW_DIE_ID_3

shadow of JTAG_TAP::EFUSE::DIE_ID_3.

Shadow of JTAG_TAP::EFUSE::DIE_ID_3.

Definition at line 61 of file cc26x0_fcfg.h.

◆ SHDW_OSC_BIAS_LDO_TRIM

reg32_t fcfg_regs_t::SHDW_OSC_BIAS_LDO_TRIM

shadow of JTAG_TAP::EFUSE::BIAS_LDO_TIM.

Internal.

Definition at line 63 of file cc26x0_fcfg.h.

◆ SOC_ADC_REF_TRIM_AND_OFFSET_EXT

reg32_t fcfg_regs_t::SOC_ADC_REF_TRIM_AND_OFFSET_EXT

AUX_ADC reference trim and offset of external reference mode.

Internal.

Definition at line 109 of file cc26x0_fcfg.h.

◆ VOLT_TRIM

reg32_t fcfg_regs_t::VOLT_TRIM

voltage trim

Internal.

Definition at line 116 of file cc26x0_fcfg.h.

The documentation for this struct was generated from the following files: