RIOT/html/at86rf215_8h_source.html

/*

 * Copyright (C) 2019 2019 ML!PA Consulting GmbH

 *

 * This file is subject to the terms and conditions of the GNU Lesser General

 * Public License v2.1. See the file LICENSE in the top level directory for more

 * details.

 */


#ifndef AT86RF215_H

#define AT86RF215_H


#include <stdint.h>

#include <stdbool.h>


#include "board.h"

#include "periph/spi.h"

#include "periph/gpio.h"

#include "net/netdev.h"

#include "net/netdev/ieee802154.h"

#include "net/gnrc/nettype.h"

#include "xtimer.h"


#ifdef __cplusplus

extern "C" {

#endif


typedef struct at86rf215_RF_regs at86rf215_RF_regs_t;


typedef struct at86rf215_BBC_regs at86rf215_BBC_regs_t;


typedef void (*at86rf215_batmon_cb_t)(void *arg);


enum {

    AT86RF215_FCHIP_100,

    AT86RF215_FCHIP_200,

    AT86RF215_FCHIP_1000,

    AT86RF215_FCHIP_2000,

};


#define AT86RF215_MAX_PKT_LENGTH        (2047)


#ifdef DOXYGEN

#define CONFIG_AT86RF215_USE_CLOCK_OUTPUT

#endif


#if defined(DOXYGEN) && !defined(CONFIG_AT86RF215_TRIM_VAL)


#define CONFIG_AT86RF215_TRIM_VAL              (0)

#endif


#ifndef CONFIG_AT86RF215_DEFAULT_CHANNEL

#define CONFIG_AT86RF215_DEFAULT_CHANNEL        (CONFIG_IEEE802154_DEFAULT_CHANNEL)

#endif


#ifndef CONFIG_AT86RF215_DEFAULT_SUBGHZ_CHANNEL

#define CONFIG_AT86RF215_DEFAULT_SUBGHZ_CHANNEL (CONFIG_IEEE802154_DEFAULT_SUBGHZ_CHANNEL)

#endif


#ifndef CONFIG_AT86RF215_RPC_EN

#define CONFIG_AT86RF215_RPC_EN                 (0)

#endif


#if IS_ACTIVE(CONFIG_AT86RF215_DEFAULT_LEGACY_OQPSK)

#define CONFIG_AT86RF215_DEFAULT_PHY_MODE   (IEEE802154_PHY_OQPSK)

#elif IS_ACTIVE(CONFIG_AT86RF215_DEFAULT_MR_OQPSK)

#define CONFIG_AT86RF215_DEFAULT_PHY_MODE   (IEEE802154_PHY_MR_OQPSK)

#elif IS_ACTIVE(CONFIG_AT86RF215_DEFAULT_MR_OFDM)

#define CONFIG_AT86RF215_DEFAULT_PHY_MODE   (IEEE802154_PHY_MR_OFDM)

#endif


#ifndef CONFIG_AT86RF215_DEFAULT_PHY_MODE

#define CONFIG_AT86RF215_DEFAULT_PHY_MODE   (IEEE802154_PHY_OQPSK)

#endif


#ifndef CONFIG_AT86RF215_DEFAULT_OQPSK_RATE

#define CONFIG_AT86RF215_DEFAULT_OQPSK_RATE     (0)

#endif


#if IS_ACTIVE(CONFIG_AT86RF215_DEFAULT_MR_OQPSK_CHIPS_100)

#define CONFIG_AT86RF215_DEFAULT_MR_OQPSK_CHIPS (AT86RF215_FCHIP_100)

#elif IS_ACTIVE(CONFIG_AT86RF215_DEFAULT_MR_OQPSK_CHIPS_200)

#define CONFIG_AT86RF215_DEFAULT_MR_OQPSK_CHIPS (AT86RF215_FCHIP_200)

#elif IS_ACTIVE(CONFIG_AT86RF215_DEFAULT_MR_OQPSK_CHIPS_1000)

#define CONFIG_AT86RF215_DEFAULT_MR_OQPSK_CHIPS (AT86RF215_FCHIP_1000)

#elif IS_ACTIVE(CONFIG_AT86RF215_DEFAULT_MR_OQPSK_CHIPS_2000)

#define CONFIG_AT86RF215_DEFAULT_MR_OQPSK_CHIPS (AT86RF215_FCHIP_2000)

#endif


#ifndef CONFIG_AT86RF215_DEFAULT_MR_OQPSK_CHIPS

#define CONFIG_AT86RF215_DEFAULT_MR_OQPSK_CHIPS (AT86RF215_FCHIP_1000)

#endif


#ifndef CONFIG_AT86RF215_DEFAULT_MR_OQPSK_RATE

#define CONFIG_AT86RF215_DEFAULT_MR_OQPSK_RATE  (2)

#endif


#ifndef CONFIG_AT86RF215_DEFAULT_MR_OFDM_OPT

#define CONFIG_AT86RF215_DEFAULT_MR_OFDM_OPT    (2)

#endif


#ifndef CONFIG_AT86RF215_DEFAULT_MR_OFDM_MCS

#define CONFIG_AT86RF215_DEFAULT_MR_OFDM_MCS    (2)

#endif


#ifndef CONFIG_AT86RF215_DEFAULT_MR_FSK_SRATE

#define CONFIG_AT86RF215_DEFAULT_MR_FSK_SRATE   FSK_SRATE_200K

#endif


#ifndef CONFIG_AT86RF215_DEFAULT_MR_FSK_MOD_IDX

#define CONFIG_AT86RF215_DEFAULT_MR_FSK_MOD_IDX (64)

#endif


#ifndef CONFIG_AT86RF215_DEFAULT_MR_FSK_MORD

#define CONFIG_AT86RF215_DEFAULT_MR_FSK_MORD    FSK_MORD_4SFK

#endif


#ifndef CONFIG_AT86RF215_DEFAULT_MR_FSK_FEC

#define CONFIG_AT86RF215_DEFAULT_MR_FSK_FEC     IEEE802154_FEC_NONE

#endif


#ifndef CONFIG_AT86RF215_DEFAULT_TXPOWER

#define CONFIG_AT86RF215_DEFAULT_TXPOWER       (CONFIG_IEEE802154_DEFAULT_TXPOWER)

#endif


typedef enum {

    AT86RF215_STATE_OFF,

    AT86RF215_STATE_IDLE,

    AT86RF215_STATE_RX_SEND_ACK,

    AT86RF215_STATE_TX,

    AT86RF215_STATE_TX_WAIT_ACK,

    AT86RF215_STATE_SLEEP

} at86rf215_state_t;

enum {

    AT86RF215_MODE_LEGACY_OQPSK,

    AT86RF215_MODE_MR_OQPSK,

    AT86RF215_MODE_MR_OFDM,

    AT86RF215_MODE_MR_FSK

};


#define AT86RF215_OPT_TELL_TX_START  (0x0001)

#define AT86RF215_OPT_TELL_TX_END    (0x0002)

#define AT86RF215_OPT_TELL_RX_START  (0x0004)

#define AT86RF215_OPT_TELL_RX_END    (0x0008)

#define AT86RF215_OPT_CSMA           (0x0010)

#define AT86RF215_OPT_PROMISCUOUS    (0x0020)

#define AT86RF215_OPT_PRELOADING     (0x0040)

#define AT86RF215_OPT_AUTOACK        (0x0080)

#define AT86RF215_OPT_ACK_REQUESTED  (0x0100)

#define AT86RF215_OPT_AGCH           (0x0200)

#define AT86RF215_OPT_TX_PENDING     (0x0400)

#define AT86RF215_OPT_CCA_PENDING    (0x0800)

#define AT86RF215_OPT_RPC            (0x1000)

#define AT86RF215_OPT_CCATX          (0x2000)

#define AT86RF215_TIMEOUT_ACK        (0x0001)

#define AT86RF215_TIMEOUT_CSMA       (0x0002)

typedef struct at86rf215_params {

    spi_t spi;

    spi_clk_t spi_clk;

    spi_cs_t cs_pin;

    gpio_t int_pin;

    gpio_t reset_pin;

} at86rf215_params_t;


typedef struct at86rf215 {

    netdev_ieee802154_t netdev;

    /* device specific fields */

    at86rf215_params_t params;

    struct at86rf215 *sibling;

    const at86rf215_RF_regs_t  *RF;

    const at86rf215_BBC_regs_t *BBC;

    xtimer_t timer;

    msg_t timer_msg;

    uint32_t ack_timeout_usec;

    uint32_t csma_backoff_period;

    uint16_t flags;

    uint16_t num_chans;

    uint16_t tx_frame_len;

    uint8_t timeout;

    uint8_t state;

    uint8_t retries_max;

    uint8_t retries;

    uint8_t csma_retries_max;

    uint8_t csma_retries;

#ifdef MODULE_NETDEV_IEEE802154_MR_FSK

    uint8_t fsk_pl;

#endif

    uint8_t csma_minbe;

    uint8_t csma_maxbe;

    int8_t  csma_ed;

} at86rf215_t;


void at86rf215_setup(at86rf215_t *dev_09, at86rf215_t *dev_24, const at86rf215_params_t *params, uint8_t index);


void at86rf215_reset_and_cfg(at86rf215_t *dev);


void at86rf215_reset(at86rf215_t *dev);


uint16_t at86rf215_get_addr_short(const at86rf215_t *dev, uint8_t filter);


void at86rf215_set_addr_short(at86rf215_t *dev, uint8_t filter, uint16_t addr);


bool at86rf215_get_framefilter_enabled(at86rf215_t *dev, uint8_t filter);


 void at86rf215_disable_framefilter(at86rf215_t *dev, uint8_t filter);


void at86rf215_enable_framefilter(at86rf215_t *dev, uint8_t filter);


uint64_t at86rf215_get_addr_long(const at86rf215_t *dev);


void at86rf215_set_addr_long(at86rf215_t *dev, uint64_t addr);


uint8_t at86rf215_get_chan(const at86rf215_t *dev);


void at86rf215_set_chan(at86rf215_t *dev, uint16_t chan);


uint16_t at86rf215_get_pan(const at86rf215_t *dev, uint8_t filter);


void at86rf215_set_pan(at86rf215_t *dev, uint8_t filter, uint16_t pan);


int16_t at86rf215_get_txpower(const at86rf215_t *dev);


void at86rf215_set_txpower(const at86rf215_t *dev, int16_t txpower);


int8_t at86rf215_get_cca_threshold(const at86rf215_t *dev);


void at86rf215_set_cca_threshold(at86rf215_t *dev, int8_t value);


int8_t at86rf215_get_ed_level(at86rf215_t *dev);


void at86rf215_set_option(at86rf215_t *dev, uint16_t option, bool state);


ssize_t at86rf215_send(at86rf215_t *dev, const void *data, size_t len);


int at86rf215_tx_prepare(at86rf215_t *dev);


size_t at86rf215_tx_load(at86rf215_t *dev, const uint8_t *data,

                         size_t len, size_t offset);


int at86rf215_tx_exec(at86rf215_t *dev);


void at86rf215_tx_abort(at86rf215_t *dev);


void at86rf215_tx_done(at86rf215_t *dev);


bool at86rf215_cca(at86rf215_t *dev);


#ifdef __cplusplus

}

#endif


#endif /* AT86RF215_H */