cc2538_ssi.h
Go to the documentation of this file.
1 /*
2  * Copyright (C) 2014 Loci Controls Inc.
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser
5  * General Public License v2.1. See the file LICENSE in the top level
6  * directory for more details.
7  */
8 
20 #ifndef CC2538_SSI_H
21 #define CC2538_SSI_H
22 
23 #include "cc2538.h"
24 
25 #ifdef __cplusplus
26 extern "C" {
27 #endif
28 
32 typedef struct {
44 } cc2538_ssi_t;
45 
49 #define SSI_CR0_DSS(x) (x - 1)
50 
55 #define SSI_CC_CS_SYSDIV (0x0)
56 #define SSI_CC_CS_IODIV (0x1)
57 #define SSI_CC_CS_DSEN (0x4)
58 
60 #ifdef __cplusplus
61 } /* end extern "C" */
62 #endif
63 
64 #endif /* CC2538_SSI_H */
65 
cc2538_ssi_t::CC
cc2538_reg_t CC
SSI clock configuration.
Definition: cc2538_ssi.h:43
cc2538_ssi_t
SSI component registers.
Definition: cc2538_ssi.h:32
cc2538_ssi_t::SR
cc2538_reg_t SR
SSI FIFO/busy Status Register.
Definition: cc2538_ssi.h:36
cc2538_ssi_t::CPSR
cc2538_reg_t CPSR
SSI Clock Register.
Definition: cc2538_ssi.h:37
cc2538_ssi_t::CR0
cc2538_reg_t CR0
SSI Control Register 0.
Definition: cc2538_ssi.h:33
cc2538_ssi_t::MIS
cc2538_reg_t MIS
SSI Masked Interrupt Status register.
Definition: cc2538_ssi.h:40
cc2538_ssi_t::DMACTL
cc2538_reg_t DMACTL
SSI uDMA Control Register.
Definition: cc2538_ssi.h:42
cc2538_ssi_t::RIS
cc2538_reg_t RIS
SSI Raw Interrupt Status register.
Definition: cc2538_ssi.h:39
cc2538_reg_t
volatile uint32_t cc2538_reg_t
Least-significant 32 bits of the IEEE address.
Definition: cc2538.h:124
cc2538_ssi_t::ICR
cc2538_reg_t ICR
SSI Interrupt Clear Register.
Definition: cc2538_ssi.h:41
cc2538_ssi_t::DR
cc2538_reg_t DR
SSI Data register.
Definition: cc2538_ssi.h:35
cc2538_ssi_t::IM
cc2538_reg_t IM
SSI Interrupt Mask register.
Definition: cc2538_ssi.h:38
cc2538.h
CC2538 MCU interrupt and register definitions.
cc2538_ssi_t::CR1
cc2538_reg_t CR1
SSI Control Register 1.
Definition: cc2538_ssi.h:34