CC26x0 AUX register definitions. More...
CC26x0 AUX register definitions.
Definition in file cc26x0_aux.h.
Go to the source code of this file.
Data Structures | |
struct | aux_aiodio_regs_t |
AUX_AIODIO registers. More... | |
struct | aux_tdc_regs_t |
AUX_TDC registers. More... | |
struct | aux_evtcl_regs_t |
AUX_EVCTL registers. More... | |
struct | aux_wuc_regs_t |
AUX_WUC registers. More... | |
struct | aux_timer_regs_t |
AUX_TIMER registers. More... | |
struct | aux_smph_regs_t |
AUX_SMPH registers. More... | |
struct | aux_anaif_regs_t |
AUX_ANAIF registers. More... | |
struct | adi_4_aux_regs_t |
ADI_4_AUX registers. More... | |
Macros | |
#define | AUX_AIODIO0 ((aux_aiodio_regs_t *) (AUX_AIODIO0_BASE)) |
AUX_AIODIO0 register bank. | |
#define | AUX_AIODIO1 ((aux_aiodio_regs_t *) (AUX_AIODIO1_BASE)) |
AUX_AIODIO1 register bank. | |
#define | AUX_TDC ((aux_tdc_regs_t *) (AUX_TDC_BASE)) |
AUX_TDC register bank. | |
#define | AUX_EVCTL ((aux_evctl_regs_t *) (AUX_EVCTL_BASE)) |
AUX_EVCTL register bank. | |
#define | AUX_WUC ((aux_wuc_regs_t *) (AUX_WUC_BASE)) |
AUX_WUC register bank. | |
#define | AUX_TIMER ((aux_timer_regs_t *) (AUX_TIMER_BASE)) |
AUX_TIMER register bank. | |
#define | AUX_ANAIF ((aux_anaif_regs_t *) (AUX_ANAIF_BASE)) |
AUX_ANAIF register bank. | |
#define | ADI_4_AUX ((adi_4_aux_regs_t *) (ADI_4_AUX_BASE)) |
ADI_4_AUX register bank. | |
#define | ADDI_SEM AUX_SMPH->SMPH0 |
the semamphore used for ADDI | |
#define | AUX_AIODIO0_BASE 0x400C1000 |
AUX_AIODIO0 base address. | |
#define | AUX_AIODIO1_BASE 0x400C2000 |
AUX_AIODIO1 base address. | |
#define | AUX_TDC_BASE 0x400C4000 |
AUX_TDC base address. | |
#define | AUX_EVCTL_BASE 0x400C5000 |
AUX_EVCTL base address. | |
#define | MODCLKEN0_SMPH_EN 0x00000001 /* enable clock for AUX_SMPH */ |
AUX_WUC register values. | |
#define | MODCLKEN0_AIODIO0_EN 0x00000002 /* enable clock for AUX_AIODIO0 */ |
#define | MODCLKEN0_AIODIO1_EN 0x00000004 /* enable clock for AUX_AIODIO1 */ |
#define | MODCLKEN0_TIMER_EN 0x00000008 /* enable clock for AUX_TIMER */ |
#define | MODCLKEN0_ANAIF_EN 0x00000010 /* enable clock for AUX_ANAIF */ |
#define | MODCLKEN0_TDC_EN 0x00000020 /* enable clock for AUX_TDC */ |
#define | MODCLKEN0_AUX_DDI0_OSC_EN 0x00000040 /* enable clock for AUX_DDI0_OSC */ |
#define | MODCLKEN0_AUX_ADI4_EN 0x00000080 /* enable clock for AUX_ADI4 */ |
#define | AUX_WUC_BASE 0x400C6000 |
AUX_WUC base address. | |
#define | AUX_TIMER_BASE 0x400C7000 |
AUX_WUC base address. | |
#define | AUX_SMPH_BASE 0x400C8000 |
AUX_WUC base address. | |
#define | AUX_SMPH ((aux_smph_regs_t *) (AUX_SMPH_BASE)) |
AUX_SMPH register bank. | |
#define | AUX_ANAIF_BASE 0x400C9000 |
AUX_WUC base address. | |
#define | ADI_4_AUX_BASE 0x400CB000 |
AUX_WUC base address. | |