cfg_timer_tim5.h File Reference

Common configuration for STM32 Timer peripheral based on TIM5. More...

Detailed Description

Common configuration for STM32 Timer peripheral based on TIM5.

Author
Alexandre Abadie alexa.nosp@m.ndre.nosp@m..abad.nosp@m.ie@i.nosp@m.nria..nosp@m.fr

Definition in file cfg_timer_tim5.h.

#include "periph_cpu.h"
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Timer configuration

#define TIMER_0_ISR   isr_tim5
 
#define TIMER_NUMOF   ARRAY_SIZE(timer_config)
 
static const timer_conf_t timer_config []
 

Variable Documentation

◆ timer_config

const timer_conf_t timer_config[]
static
Initial value:
= {
{
.dev = TIM5,
.max = 0xffffffff,
.rcc_mask = RCC_APB1ENR_TIM5EN,
.bus = APB1,
.irqn = TIM5_IRQn
}
}

Definition at line 32 of file cfg_timer_tim5.h.

APB1
@ APB1
APB1 bus.
Definition: periph_cpu.h:176