dpl_os.h
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1 /*
2  * Copyright (C) 2020 Inria
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser
5  * General Public License v2.1. See the file LICENSE in the top level
6  * directory for more details.
7  */
8 
20 #ifndef DPL_DPL_OS_H
21 #define DPL_DPL_OS_H
22 
23 #include <assert.h>
24 #include <stdint.h>
25 #include <stdatomic.h>
26 
27 #include "irq.h"
28 #include "dpl/dpl_types.h"
29 
30 #ifdef __cplusplus
31 extern "C" {
32 #endif
33 
38 #define DPL_ENTER_CRITICAL(_sr) (_sr = dpl_hw_enter_critical())
39 #define DPL_EXIT_CRITICAL(_sr) (dpl_hw_exit_critical(_sr))
40 #define DPL_ASSERT_CRITICAL() assert(dpl_hw_is_in_critical())
41 
47 
51 typedef uint32_t dpl_sr_t;
52 
58 static inline uint32_t dpl_hw_enter_critical(void)
59 {
60  uint32_t ctx = irq_disable();
61  unsigned int count = atomic_load(&dpl_in_critical);
62  atomic_store(&dpl_in_critical, count + 1);
63  return ctx;
64 }
65 
71 static inline void dpl_hw_exit_critical(uint32_t ctx)
72 {
73  unsigned int count = atomic_load(&dpl_in_critical);
74  atomic_store(&dpl_in_critical, count - 1);
75  irq_restore((unsigned)ctx);
76 }
77 
83 static inline bool dpl_hw_is_in_critical(void)
84 {
85  /*
86  * XXX Currently RIOT does not support an API for finding out if interrupts
87  * are currently disabled, hence in a critical section in this context.
88  * So for now, we use this global variable to keep this state for us.
89  */
90  return (atomic_load(&dpl_in_critical) > 0);
91 }
92 
93 #ifdef __cplusplus
94 }
95 #endif
96 
97 #endif /* DPL_DPL_OS_H */
dpl_hw_enter_critical
static uint32_t dpl_hw_enter_critical(void)
Disable ISRs.
Definition: dpl_os.h:58
irq_disable
MAYBE_INLINE unsigned irq_disable(void)
This function sets the IRQ disable bit in the status register.
dpl_hw_exit_critical
static void dpl_hw_exit_critical(uint32_t ctx)
Restores ISR context.
Definition: dpl_os.h:71
assert.h
POSIX.1-2008 compliant version of the assert macro.
irq_restore
MAYBE_INLINE void irq_restore(unsigned state)
This function restores the IRQ disable bit in the status register to the value contained within passe...
atomic_uint
Type with the same alignment and size as atomic_uint
Definition: c11_atomics_compat.hpp:130
irq.h
IRQ driver interface.
dpl_in_critical
atomic_uint dpl_in_critical
variable to check if ISR are disabled
dpl_hw_is_in_critical
static bool dpl_hw_is_in_critical(void)
Check if is in critical section.
Definition: dpl_os.h:83
dpl_types.h
uwb-core DPL (Decawave Porting Layer) types
dpl_sr_t
uint32_t dpl_sr_t
CPU status register.
Definition: dpl_os.h:51