periph_cpu.h File Reference

CPU specific definitions for internal peripheral handling. More...

Detailed Description

CPU specific definitions for internal peripheral handling.

Author
Hauke Petersen hauke.nosp@m..pet.nosp@m.ersen.nosp@m.@fu-.nosp@m.berli.nosp@m.n.de
Joakim NohlgÄrd joaki.nosp@m.m.no.nosp@m.hlgar.nosp@m.d@ei.nosp@m.stec..nosp@m.se

Definition in file periph_cpu.h.

#include <stdint.h>
#include <stdbool.h>
#include "cpu.h"
+ Include dependency graph for periph_cpu.h:

Go to the source code of this file.

Data Structures

struct  adc_conf_t
 ADC device configuration. More...
 
struct  pit_conf_t
 CPU specific timer PIT module configuration. More...
 
struct  i2c_conf_t
 I2C configuration options. More...
 
struct  spi_conf_t
 SPI configuration structure type. More...
 
struct  uart_conf_t
 UART device configuration. More...
 

Macros

#define GPIO_UNDEF   (0xffff)
 Definition of a fitting UNDEF value.
 
#define GPIO_PIN(x, y)   (((x + 1) << 12) | (x << 6) | y)
 Define a CPU specific GPIO pin generator macro.
 
#define CPUID_ADDR   (&SIM->UIDMH)
 Starting offset of CPU_ID.
 
#define CPUID_LEN   (12U)
 Length of the CPU_ID in octets.
 
#define GPIO_MODE(pu, pe, od, out)   (pu | (pe << 1) | (od << 5) | (out << 7))
 Generate GPIO mode bitfields. More...
 
#define SPI_HWCS(x)   (x)
 Define a CPU specific SPI hardware chip select line macro. More...
 
#define SPI_HWCS_NUMOF   (5)
 Kinetis CPUs have a maximum number of 5 hardware chip select lines.
 
#define PERIPH_TIMER_PROVIDES_SET
 Prevent shared timer functions from being used.
 
#define ADC_AVG_NONE   (0)
 Disable hardware averaging.
 
#define ADC_AVG_MAX   (ADC_SC3_AVGE_MASK | ADC_SC3_AVGS(3))
 Maximum hardware averaging (32 samples)
 
#define KINETIS_HAVE_PLL   1
 Defined to 1 if the MCG in this Kinetis CPU has a PLL.
 

Enumerations

enum  {
  PORT_A = 0, PORT_B = 1, PORT_C = 2, PORT_D = 3,
  PORT_E = 4, PORT_F = 5, PORT_G = 6, GPIO_PORTS_NUMOF
}
 Available ports on the Kinetis family. More...
 
enum  uart_mode_t { UART_MODE_8N1 = 0, UART_MODE_8E1 = (UART_C1_M_MASK | UART_C1_PE_MASK), UART_MODE_8O1 = (UART_C1_M_MASK | UART_C1_PE_MASK | UART_C1_PT_MASK) }
 UART transmission modes. More...
 
enum  { TIMER_PIT }
 Possible timer module types. More...
 
enum  uart_type_t { KINETIS_UART, KINETIS_LPUART, STM32_USART, STM32_LPUART }
 UART hardware module types. More...
 

Functions

void gpio_init_port (gpio_t pin, uint32_t pcr)
 CPU internal function for initializing PORTs. More...
 

CPU specific gpio_t type definition

#define HAVE_GPIO_T
 
typedef uint16_t gpio_t
 

This CPU makes use of the following shared SPI functions

#define PERIPH_SPI_NEEDS_TRANSFER_BYTE   1
 
#define PERIPH_SPI_NEEDS_TRANSFER_REG   1
 
#define PERIPH_SPI_NEEDS_TRANSFER_REGS   1
 

Kinetis power mode configuration

#define PM_NUM_MODES   (3U)
 
#define PM_BLOCK(x)
 
#define PM_UNBLOCK(x)
 
enum  { KINETIS_PM_LLS = 0, KINETIS_PM_VLPS = 1, KINETIS_PM_STOP = 2, KINETIS_PM_WAIT = 3 }
 

Hardware timer type-specific device macros

#define TIMER_PIT_DEV(x)   (TIMER_DEV(0 + (x)))
 Timers using PIT backend.
 

Macro Definition Documentation

◆ GPIO_MODE

#define GPIO_MODE (   pu,
  pe,
  od,
  out 
)    (pu | (pe << 1) | (od << 5) | (out << 7))

Generate GPIO mode bitfields.

We use the following bits to encode the pin mode:

  • bit 0: 0 for pull-down or 1 for pull-up
  • bit 1: pull resistor enable (as configured in bit 0)
  • bit 5: OD enable
  • bit 7: output or input mode

Definition at line 103 of file periph_cpu.h.

◆ SPI_HWCS

#define SPI_HWCS (   x)    (x)

Define a CPU specific SPI hardware chip select line macro.

We simply map the 5 hardware channels to the numbers [0-4], this still allows us to differentiate between GPIP_PINs and SPI_HWSC lines.

Definition at line 111 of file periph_cpu.h.

Enumeration Type Documentation

◆ anonymous enum

anonymous enum

Available ports on the Kinetis family.

Not all CPUs have the full number of ports, see your CPU data sheet for pinout.

Enumerator
PORT_A 

port A

PORT_B 

port B

PORT_C 

port C

PORT_D 

port D

PORT_E 

port E

PORT_F 

port F

PORT_G 

port G

GPIO_PORTS_NUMOF 

overall number of available ports

Definition at line 233 of file periph_cpu.h.

◆ anonymous enum

anonymous enum

Possible timer module types.

Enumerator
TIMER_PIT 

PIT.

Definition at line 484 of file periph_cpu.h.

◆ uart_mode_t

UART transmission modes.

Enumerator
UART_MODE_8N1 

8 data bits, no parity, 1 stop bit

UART_MODE_8E1 

8 data bits, even parity, 1 stop bit

UART_MODE_8O1 

8 data bits, odd parity, 1 stop bit

Definition at line 284 of file periph_cpu.h.

◆ uart_type_t

UART hardware module types.

Enumerator
KINETIS_UART 

Kinetis UART module type.

KINETIS_LPUART 

Kinetis Low-power UART (LPUART) module type.

STM32_USART 

STM32 USART module type.

STM32_LPUART 

STM32 Low-power UART (LPUART) module type.

Definition at line 506 of file periph_cpu.h.

Function Documentation

◆ gpio_init_port()

void gpio_init_port ( gpio_t  pin,
uint32_t  pcr 
)

CPU internal function for initializing PORTs.

Parameters
[in]pinpin to initialize
[in]pcrvalue for the PORT's PCR register