periph_cpu_common.h
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1 /*
2  * Copyright(C) 2017, Imagination Technologies Limited and/or its
3  * affiliated group companies.
4  *
5  * This file is subject to the terms and conditions of the GNU Lesser
6  * General Public License v2.1. See the file LICENSE in the top level
7  * directory for more details.
8  *
9  */
10 
22 #ifndef PERIPH_CPU_COMMON_H
23 #define PERIPH_CPU_COMMON_H
24 
25 #include "cpu.h"
26 
27 #ifdef __cplusplus
28 extern "C" {
29 #endif
30 
34 #define FLASH_XIP (1)
35 
40 #define PROVIDES_PM_SET_LOWEST
41 
46 #define CPUID_LEN (4U)
47 
48 #ifndef DOXYGEN
49 
53 #define HAVE_GPIO_T
54 typedef uint32_t gpio_t;
56 #endif
57 
61 #define GPIO_PIN(x, y) (((_PORTB_BASE_ADDRESS & 0xFFFFF000) + (x << 8)) | y)
62 
66 enum {
67  PORT_A = 0,
68  PORT_B = 1,
69  PORT_C = 2,
70  PORT_D = 3,
71  PORT_E = 4,
72  PORT_F = 5,
73  PORT_G = 6,
74 };
75 
79 #define PERIPH_TIMER_PROVIDES_SET
80 
81 
85 typedef enum {
86  GPIO_AF0 = 0,
102 } gpio_af_t;
103 
107 typedef struct {
108  volatile unsigned int * base;
109  uint32_t clock;
110  gpio_t rx_pin;
111  gpio_t tx_pin;
112  volatile unsigned int *rx_mux_reg;
113  volatile unsigned int *tx_mux_reg;
116  uint32_t vector;
117 #ifdef CPU_FAM_PIC32MX
118  uint32_t irq;
119 #endif
120 } uart_conf_t;
121 
122 #ifdef __cplusplus
123 }
124 #endif
125 
126 #endif /* PERIPH_CPU_COMMON_H */
127 
GPIO_AF10
@ GPIO_AF10
use alternate function 10
Definition: periph_cpu_common.h:96
GPIO_AF8
@ GPIO_AF8
use alternate function 8
Definition: periph_cpu_common.h:94
GPIO_AF9
@ GPIO_AF9
use alternate function 9
Definition: periph_cpu_common.h:95
GPIO_AF4
@ GPIO_AF4
use alternate function 4
Definition: periph_cpu_common.h:90
uart_conf_t::tx_af
gpio_af_t tx_af
alternate function for TX pin
Definition: periph_cpu_common.h:115
uart_conf_t::tx_mux_reg
volatile unsigned int * tx_mux_reg
Address of TX mux register.
Definition: periph_cpu_common.h:113
GPIO_AF11
@ GPIO_AF11
use alternate function 11
Definition: periph_cpu_common.h:97
uart_conf_t::clock
uint32_t clock
Peripheral clock frequency.
Definition: periph_cpu_common.h:109
GPIO_AF15
@ GPIO_AF15
use alternate function 15
Definition: periph_cpu_common.h:101
PORT_G
@ PORT_G
port G
Definition: periph_cpu_common.h:73
gpio_af_t
gpio_af_t
Available MUX values for configuring a pin's alternate function.
Definition: periph_cpu_common.h:85
GPIO_AF5
@ GPIO_AF5
use alternate function 5
Definition: periph_cpu_common.h:91
GPIO_AF12
@ GPIO_AF12
use alternate function 12
Definition: periph_cpu_common.h:98
PORT_E
@ PORT_E
port E
Definition: periph_cpu_common.h:71
uart_conf_t::rx_mux_reg
volatile unsigned int * rx_mux_reg
Address of RX mux register.
Definition: periph_cpu_common.h:112
PORT_F
@ PORT_F
port F
Definition: periph_cpu_common.h:72
PORT_C
@ PORT_C
port C
Definition: periph_cpu_common.h:69
GPIO_AF14
@ GPIO_AF14
use alternate function 14
Definition: periph_cpu_common.h:100
uart_conf_t::vector
uint32_t vector
vector number
Definition: periph_cpu_common.h:116
uart_conf_t
UART device configuration.
Definition: periph_cpu.h:166
GPIO_AF1
@ GPIO_AF1
use alternate function 1
Definition: periph_cpu_common.h:87
GPIO_AF3
@ GPIO_AF3
use alternate function 3
Definition: periph_cpu_common.h:89
PORT_D
@ PORT_D
port D
Definition: periph_cpu_common.h:70
uart_conf_t::rx_af
gpio_af_t rx_af
alternate function for RX pin
Definition: periph_cpu_common.h:114
uart_conf_t::base
volatile unsigned int * base
UART device base register address.
Definition: periph_cpu_common.h:108
GPIO_AF7
@ GPIO_AF7
use alternate function 7
Definition: periph_cpu_common.h:93
PORT_A
@ PORT_A
port A
Definition: periph_cpu_common.h:67
GPIO_AF6
@ GPIO_AF6
use alternate function 6
Definition: periph_cpu_common.h:92
GPIO_AF2
@ GPIO_AF2
use alternate function 2
Definition: periph_cpu_common.h:88
GPIO_AF0
@ GPIO_AF0
use alternate function 0
Definition: periph_cpu_common.h:86
gpio_t
unsigned int gpio_t
GPIO type identifier.
Definition: gpio.h:91
PORT_B
@ PORT_B
port B
Definition: periph_cpu_common.h:68
GPIO_AF13
@ GPIO_AF13
use alternate function 13
Definition: periph_cpu_common.h:99