periph_cpu.h
Go to the documentation of this file.
1 /*
2  * Copyright (C) 2015-2016 Freie Universität Berlin
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser
5  * General Public License v2.1. See the file LICENSE in the top level
6  * directory for more details.
7  */
8 
20 #ifndef PERIPH_CPU_H
21 #define PERIPH_CPU_H
22 
23 #include "periph_cpu_common.h"
24 
25 #ifdef __cplusplus
26 extern "C" {
27 #endif
28 
32 #define CPU_BACKUP_RAM_NOT_RETAINED (1)
33 
38 #define PM_NUM_MODES (2)
39 
45 enum {
50 };
53 #ifndef DOXYGEN
54 #define HAVE_ADC_RES_T
55 typedef enum {
56  ADC_RES_6BIT = 0xff,
57  ADC_RES_8BIT = ADC_CTRLC_RESSEL_8BIT,
58  ADC_RES_10BIT = ADC_CTRLC_RESSEL_10BIT,
59  ADC_RES_12BIT = ADC_CTRLC_RESSEL_12BIT,
60  ADC_RES_14BIT = 0xfe,
61  ADC_RES_16BIT = 0xfd
62 } adc_res_t;
64 #endif /* ndef DOXYGEN */
65 
69 #define DAC_RES_BITS (12)
70 
74 #define DAC_NUMOF (2)
75 
80 #define RTT_MAX_VALUE (0xffffffff)
81 #define RTT_CLOCK_FREQUENCY (32768U) /* in Hz */
82 #define RTT_MIN_FREQUENCY (RTT_CLOCK_FREQUENCY / 512U) /* in Hz */
83 #define RTT_MAX_FREQUENCY (RTT_CLOCK_FREQUENCY) /* in Hz */
84 /* determined by tests/ztimer_underflow */
85 #define RTT_MIN_OFFSET (8U)
86 
93 struct sam0_aux_cfg_mapping {
94  uint64_t bootloader_size : 3;
95  uint64_t reserved_0 : 1;
96  uint64_t eeprom_size : 3;
97  uint64_t reserved_1 : 1;
98  uint64_t bod33_level : 6;
99  uint64_t bod33_enable : 1;
100  uint64_t bod33_action : 2;
101  uint64_t reserved_2 : 9;
102  uint64_t wdt_enable : 1;
103  uint64_t wdt_always_on : 1;
104  uint64_t wdt_period : 4;
105  uint64_t wdt_window : 4;
106  uint64_t wdt_ewoffset : 4;
107  uint64_t wdt_window_enable : 1;
108  uint64_t bod33_hysteresis : 1;
109  uint64_t reserved_3 : 6;
110  uint64_t nvm_locks : 16;
111 };
114 #ifdef __cplusplus
115 }
116 #endif
117 
118 #endif /* PERIPH_CPU_H */
119 
sam0_aux_cfg_mapping::eeprom_size
uint64_t eeprom_size
one of eight different EEPROM sizes
Definition: periph_cpu.h:133
ADC_RES_6BIT
@ ADC_RES_6BIT
ADC resolution: 6 bit.
Definition: adc.h:94
SAM0_GCLK_MAIN
@ SAM0_GCLK_MAIN
48 MHz main clock
Definition: periph_cpu.h:59
sam0_aux_cfg_mapping
NVM User Row Mapping - Dedicated Entries Config values will be applied at power-on.
Definition: periph_cpu.h:130
sam0_aux_cfg_mapping::bod33_level
uint64_t bod33_level
BOD33 threshold level at power-on.
Definition: periph_cpu.h:135
sam0_aux_cfg_mapping::bod33_action
uint64_t bod33_action
BOD33 Action at power-on.
Definition: periph_cpu.h:137
sam0_aux_cfg_mapping::reserved_2
uint64_t reserved_2
Factory settings - do not change.
Definition: periph_cpu.h:138
ADC_RES_14BIT
@ ADC_RES_14BIT
ADC resolution: 14 bit.
Definition: adc.h:98
adc_res_t
adc_res_t
Possible ADC resolution settings.
Definition: adc.h:93
sam0_aux_cfg_mapping::bod33_hysteresis
uint64_t bod33_hysteresis
BOD33 Hysteresis configuration
Definition: periph_cpu.h:145
ADC_RES_16BIT
@ ADC_RES_16BIT
ADC resolution: 16 bit.
Definition: adc.h:99
sam0_aux_cfg_mapping::wdt_enable
uint64_t wdt_enable
WDT Enable at power-on.
Definition: periph_cpu.h:139
ADC_RES_8BIT
@ ADC_RES_8BIT
ADC resolution: 8 bit.
Definition: adc.h:95
SAM0_GCLK_32KHZ
@ SAM0_GCLK_32KHZ
32 kHz clock
Definition: periph_cpu.h:61
sam0_aux_cfg_mapping::wdt_window
uint64_t wdt_window
WDT Window at power-on.
Definition: periph_cpu.h:142
sam0_aux_cfg_mapping::reserved_1
uint64_t reserved_1
Factory settings - do not change.
Definition: periph_cpu.h:134
sam0_aux_cfg_mapping::bod33_enable
uint64_t bod33_enable
BOD33 Enable at power-on.
Definition: periph_cpu.h:136
sam0_aux_cfg_mapping::bootloader_size
uint64_t bootloader_size
BOOTPROT: Bootloader Size
Definition: periph_cpu.h:131
sam0_aux_cfg_mapping::wdt_ewoffset
uint64_t wdt_ewoffset
WDT Early Warning Interrupt Offset
Definition: periph_cpu.h:143
sam0_aux_cfg_mapping::wdt_window_enable
uint64_t wdt_window_enable
WDT Window mode enabled on power-on
Definition: periph_cpu.h:144
sam0_aux_cfg_mapping::nvm_locks
uint64_t nvm_locks
NVM Region Lock Bits.
Definition: periph_cpu.h:148
ADC_RES_10BIT
@ ADC_RES_10BIT
ADC resolution: 10 bit.
Definition: adc.h:96
ADC_RES_12BIT
@ ADC_RES_12BIT
ADC resolution: 12 bit.
Definition: adc.h:97
SAM0_GCLK_48MHZ
@ SAM0_GCLK_48MHZ
48MHz clock
Definition: periph_cpu.h:49
sam0_aux_cfg_mapping::reserved_3
uint64_t reserved_3
Factory settings - do not change.
Definition: periph_cpu.h:147
SAM0_GCLK_8MHZ
@ SAM0_GCLK_8MHZ
8MHz clock
Definition: periph_cpu.h:47
sam0_aux_cfg_mapping::wdt_always_on
uint64_t wdt_always_on
WDT Always-On at power-on.
Definition: periph_cpu.h:140
sam0_aux_cfg_mapping::wdt_period
uint64_t wdt_period
WDT Period at power-on.
Definition: periph_cpu.h:141
sam0_aux_cfg_mapping::reserved_0
uint64_t reserved_0
Factory settings - do not change.
Definition: periph_cpu.h:132