Common configuration for clock, timer, pwm, adc, rtc and rtt peripherals for Arduino MKR boards.
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#include "periph_cpu.h"
Go to the source code of this file.
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For selection of the used CORECLOCK, we have implemented two choices:
- usage of the PLL fed by the internal 8MHz oscillator divided by 8
- usage of the internal 8MHz oscillator directly, divided by N if needed
The PLL option allows for the usage of a wider frequency range and a more stable clock with less jitter. This is why we use this option as default.
The target frequency is computed from the PLL multiplier and the PLL divisor. Use the following formula to compute your values:
CORECLOCK = ((PLL_MUL + 1) * 1MHz) / PLL_DIV
NOTE: The PLL circuit does not run with less than 32MHz while the maximum PLL frequency is 96MHz. So PLL_MULL must be between 31 and 95!
The internal Oscillator used directly can lead to a slightly better power efficiency to the cost of a less stable clock. Use this option when you know what you are doing! The actual core frequency is adjusted as follows:
CORECLOCK = 8MHz / DIV
NOTE: A core clock frequency below 1MHz is not recommended
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#define | CLOCK_USE_PLL (1) |
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#define | CLOCK_PLL_MUL (47U) /* must be >= 31 & <= 95 */ |
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#define | CLOCK_PLL_DIV (1U) /* adjust to your needs */ |
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#define | CLOCK_CORECLOCK (((CLOCK_PLL_MUL + 1) * 1000000U) / CLOCK_PLL_DIV) |
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#define | TIMER_0_MAX_VALUE 0xffff |
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#define | TIMER_0_ISR isr_tc3 |
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#define | TIMER_1_ISR isr_tc4 |
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#define | TIMER_NUMOF ARRAY_SIZE(timer_config) |
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static const tc32_conf_t | timer_config [] |
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#define | ADC_PRESCALER ADC_CTRLB_PRESCALER_DIV512 |
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#define | ADC_NEG_INPUT ADC_INPUTCTRL_MUXNEG_GND |
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#define | ADC_GAIN_FACTOR_DEFAULT ADC_INPUTCTRL_GAIN_1X |
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#define | ADC_REF_DEFAULT ADC_REFCTRL_REFSEL_INT1V |
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#define | ADC_NUMOF ARRAY_SIZE(adc_channels) |
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static const adc_conf_chan_t | adc_channels [] |
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#define | RTT_FREQUENCY (32768U) /* in Hz. For changes see `rtt.c` */ |
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◆ adc_channels
◆ i2c_config
◆ pwm_chan0_config
◆ pwm_config
◆ sam_usbdev_config
◆ timer_config
Initial value:= {
{
.dev = TC3,
.irq = TC3_IRQn,
.pm_mask = PM_APBCMASK_TC3,
.gclk_ctrl = GCLK_CLKCTRL_ID_TCC2_TC3,
.flags = TC_CTRLA_MODE_COUNT16,
},
{
.dev = TC4,
.irq = TC4_IRQn,
.pm_mask = PM_APBCMASK_TC4 | PM_APBCMASK_TC5,
.gclk_ctrl = GCLK_CLKCTRL_ID_TC4_TC5,
.flags = TC_CTRLA_MODE_COUNT32,
}
}
Definition at line 86 of file periph_conf_common.h.