periph_cpu_common.h File Reference
CPU specific definitions for internal peripheral handling. More...
Detailed Description
CPU specific definitions for internal peripheral handling.
Definition in file periph_cpu_common.h.
#include "cpu.h"
Include dependency graph for periph_cpu_common.h:Go to the source code of this file.
Data Structures | |
| struct | pwm_conf_t |
| PWM device configuration. More... | |
Macros | |
| #define | GPIO_UNDEF (0xff) |
| Definition of a fitting UNDEF value. | |
| #define | GPIO_PIN(x, y) ((x << 4) | y) |
| Define a CPU specific GPIO pin generator macro. | |
| #define | PERIPH_TIMER_PROVIDES_SET |
| A low-level timer_set() implementation is provided. | |
| #define | EEPROM_CLEAR_BYTE (0xff) |
| EEPROM clear byte. | |
| #define | WDT_HAS_STOP (1) |
| WDT can be stopped on AVR. | |
Length of the CPU_ID in octets | |
| #define | CPUID_LEN (4U) |
| #define | PERIPH_SPI_NEEDS_INIT_CS |
| Use some common SPI functions. | |
| #define | PERIPH_SPI_NEEDS_TRANSFER_BYTE |
| #define | PERIPH_SPI_NEEDS_TRANSFER_REG |
| #define | PERIPH_SPI_NEEDS_TRANSFER_REGS |
Bitmasks indicating which are the possible dividers for a timer | |
| enum | timer_div_t { TIMER_DIV1_8_64_128_1024 = 0x549, TIMER_DIV1_8_32_64_128_256_1024 = 0x5E9 } |
WDT upper and lower bound times in ms | |
| #define | NWDT_TIME_LOWER_LIMIT (1) |
| #define | NWDT_TIME_UPPER_LIMIT (8192U) |
RTT configuration | |
| #define | RTT_MAX_VALUE (0x00FFFFFF) /* 24-bit timer */ |
| #define | RTT_FREQUENCY (1024U) /* in Hz. */ |
Enumeration Type Documentation
◆ timer_div_t
| enum timer_div_t |
| Enumerator | |
|---|---|
| TIMER_DIV1_8_64_128_1024 | 1/{1,8,64,128,1024} |
| TIMER_DIV1_8_32_64_128_256_1024 | 1/{1,8,32,64,128,256,1024} |
Definition at line 143 of file periph_cpu_common.h.
