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periph_conf.h
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/*
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* Copyright (C) 2020 Bruno Chianca <brunobcf@gmail.com>
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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#ifndef PERIPH_CONF_H
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#define PERIPH_CONF_H
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#include "periph_cpu.h"
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#include "
cfg_clock_32_1.h
"
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#include "cfg_rtt_default.h"
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#include "cfg_timer_default.h"
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#ifdef __cplusplus
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extern
"C"
{
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#endif
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static
const
uart_conf_t
uart_config[] = {
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{
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.
dev
= NRF_UARTE0,
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.rx_pin =
GPIO_PIN
(0, 25),
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.tx_pin =
GPIO_PIN
(0, 24),
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#ifdef MODULE_PERIPH_UART_HW_FC
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.rts_pin =
GPIO_UNDEF
,
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.cts_pin =
GPIO_UNDEF
,
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#endif
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.irqn = UARTE0_UART0_IRQn,
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},
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};
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#define UART_0_ISR isr_uart0
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#define UART_NUMOF ARRAY_SIZE(uart_config)
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static
const
spi_conf_t
spi_config[] = {
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{
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.
dev
= NRF_SPIM0,
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.sclk =
GPIO_PIN
(0, 13),
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.mosi =
GPIO_PIN
(0, 15),
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.miso =
GPIO_PIN
(0, 20),
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}
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};
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#define SPI_NUMOF ARRAY_SIZE(spi_config)
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static
const
i2c_conf_t
i2c_config[] = {
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{
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.
dev
= NRF_TWIM1,
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.scl =
GPIO_PIN
(0, 14),
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.sda =
GPIO_PIN
(0, 16),
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.speed =
I2C_SPEED_NORMAL
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}
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};
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#define I2C_NUMOF ARRAY_SIZE(i2c_config)
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#ifdef __cplusplus
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}
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#endif
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#endif
/* PERIPH_CONF_H */
cfg_clock_32_1.h
Common clock configuration for the nRF52 based boards.
I2C_SPEED_NORMAL
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition:
i2c.h:177
GPIO_UNDEF
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
Definition:
periph_cpu_common.h:52
uart_conf_t
UART device configuration.
Definition:
periph_cpu.h:166
uart_conf_t::dev
cc2538_uart_t * dev
pointer to the used UART device
Definition:
periph_cpu.h:167
GPIO_PIN
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition:
periph_cpu.h:35
i2c_conf_t
I2C configuration options.
Definition:
periph_cpu.h:128
spi_conf_t::dev
SPI_Type * dev
SPI device to use.
Definition:
periph_cpu.h:465
spi_conf_t
SPI configuration structure type.
Definition:
periph_cpu.h:273
i2c_conf_t::dev
I2C_TypeDef * dev
USART device used.
Definition:
periph_cpu.h:247
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