periph_conf.h
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1 /*
2  * Copyright (C) 2018 Inria
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser
5  * General Public License v2.1. See the file LICENSE in the top level
6  * directory for more details.
7  */
8 
20 #ifndef PERIPH_CONF_H
21 #define PERIPH_CONF_H
22 
23 #include "periph_conf_common.h"
24 
25 #ifdef __cplusplus
26 extern "C" {
27 #endif
28 
33 static const spi_conf_t spi_config[] = {
34  {
35  .dev = NRF_SPIM0,
36  .sclk = GPIO_PIN(1, 15),
37  .mosi = GPIO_PIN(1, 13),
38  .miso = GPIO_PIN(1, 14),
39  },
40  {
41  .dev = NRF_SPIM2,
42  .sclk = GPIO_PIN(0, 19),
43  .mosi = GPIO_PIN(0, 20),
44  .miso = GPIO_PIN(0, 21),
45  }
46 };
47 #define SPI_NUMOF ARRAY_SIZE(spi_config)
48 
54 static const uart_conf_t uart_config[] = {
55  { /* Mapped to USB virtual COM port */
56  .dev = NRF_UARTE0,
57  .rx_pin = GPIO_PIN(0,8),
58  .tx_pin = GPIO_PIN(0,6),
59 #ifdef MODULE_PERIPH_UART_HW_FC
60  .rts_pin = GPIO_UNDEF,
61  .cts_pin = GPIO_UNDEF,
62 #endif
63  .irqn = UARTE0_UART0_IRQn,
64  },
65  { /* Mapped to Arduino D0/D1 pins */
66  .dev = NRF_UARTE1,
67  .rx_pin = GPIO_PIN(1,1),
68  .tx_pin = GPIO_PIN(1,2),
69 #ifdef MODULE_PERIPH_UART_HW_FC
70  .rts_pin = GPIO_UNDEF,
71  .cts_pin = GPIO_UNDEF,
72 #endif
73  .irqn = UARTE1_IRQn,
74  },
75 };
76 
77 #define UART_0_ISR (isr_uart0)
78 #define UART_1_ISR (isr_uarte1)
79 
80 #define UART_NUMOF ARRAY_SIZE(uart_config)
81 
83 #ifdef __cplusplus
84 }
85 #endif
86 
87 #endif /* PERIPH_CONF_H */
88 
GPIO_UNDEF
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
Definition: periph_cpu_common.h:52
uart_conf_t
UART device configuration.
Definition: periph_cpu.h:166
uart_conf_t::dev
cc2538_uart_t * dev
pointer to the used UART device
Definition: periph_cpu.h:167
GPIO_PIN
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:35
spi_conf_t::dev
SPI_Type * dev
SPI device to use.
Definition: periph_cpu.h:465
spi_conf_t
SPI configuration structure type.
Definition: periph_cpu.h:273