periph_conf.h
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1 /*
2  * Copyright (C) 2016 Freie Universität Berlin
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser General
5  * Public License v2.1. See the file LICENSE in the top level directory for more
6  * details.
7  */
8 
20 #ifndef PERIPH_CONF_H
21 #define PERIPH_CONF_H
22 
23 #include "periph_cpu.h"
24 #include "vendor_conf.h"
25 
26 #ifdef __cplusplus
27 extern "C" {
28 #endif
29 
34 #define TIMER_NUMOF (1U)
35 #define TIMER_IRQ_PRIO 1
36 
37 /* Timer 0 configuration */
38 #define TIMER_0_DEV LPC_TIM0
39 #define TIMER_0_CHANNELS 4
40 #define TIMER_0_FREQ (96000000ul)
41 #define TIMER_0_MAX_VALUE (0xffffffff)
42 #define TIMER_0_CLKEN() (LPC_SC->PCONP |= (1 << 1))
43 #define TIMER_0_CLKDIS() (LPC_SC->PCONP &= ~(1 << 1))
44 #define TIMER_0_PLKSEL() (LPC_SC->PCLKSEL0 |= (1 << 2))
45 #define TIMER_0_ISR isr_timer0
46 #define TIMER_0_IRQ TIMER0_IRQn
47 
53 static const uart_conf_t uart_config[] = {
54  {
55  .dev = (LPC_UART_TypeDef*)LPC_UART0,
56  .irq_rx = UART0_IRQn,
57  .clk_offset = 3,
58  .pinsel = 0,
59  .pinsel_shift = 2,
60  .pinsel_af = 1,
61  },
62  {
63  .dev = (LPC_UART_TypeDef*)LPC_UART3,
64  .irq_rx = UART3_IRQn,
65  .clk_offset = 25,
66  .pinsel = 0,
67  .pinsel_shift = 0,
68  .pinsel_af = 2
69  }
70 };
71 
72 #define UART_IRQ_PRIO 1
73 
74 #define UART_0_ISR isr_uart0
75 #define UART_1_ISR isr_uart3
76 
77 #define UART_NUMOF ARRAY_SIZE(uart_config)
78 
81 #ifdef __cplusplus
82 }
83 #endif
84 
85 #endif /* PERIPH_CONF_H */
86 
vendor_conf.h
CMSIS Cortex-M3 Device Peripheral Access Layer Source File for the NXP LPC17xx Device Series.
uart_conf_t
UART device configuration.
Definition: periph_cpu.h:166
UART0_IRQn
@ UART0_IRQn
UART0
Definition: cc2538.h:52
uart_conf_t::dev
cc2538_uart_t * dev
pointer to the used UART device
Definition: periph_cpu.h:167