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periph_conf.h
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/*
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* Copyright (C) 2016 Freie Universität Berlin
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*
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* This file is subject to the terms and conditions of the GNU Lesser General
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* Public License v2.1. See the file LICENSE in the top level directory for more
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* details.
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*/
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#ifndef PERIPH_CONF_H
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#define PERIPH_CONF_H
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#include "periph_cpu.h"
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#include "
vendor_conf.h
"
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#ifdef __cplusplus
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extern
"C"
{
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#endif
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#define TIMER_NUMOF (1U)
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#define TIMER_IRQ_PRIO 1
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/* Timer 0 configuration */
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#define TIMER_0_DEV LPC_TIM0
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#define TIMER_0_CHANNELS 4
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#define TIMER_0_FREQ (96000000ul)
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#define TIMER_0_MAX_VALUE (0xffffffff)
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#define TIMER_0_CLKEN() (LPC_SC->PCONP |= (1 << 1))
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#define TIMER_0_CLKDIS() (LPC_SC->PCONP &= ~(1 << 1))
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#define TIMER_0_PLKSEL() (LPC_SC->PCLKSEL0 |= (1 << 2))
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#define TIMER_0_ISR isr_timer0
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#define TIMER_0_IRQ TIMER0_IRQn
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static
const
uart_conf_t
uart_config[] = {
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{
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.
dev
= (LPC_UART_TypeDef*)LPC_UART0,
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.irq_rx =
UART0_IRQn
,
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.clk_offset = 3,
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.pinsel = 0,
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.pinsel_shift = 2,
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.pinsel_af = 1,
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},
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{
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.dev = (LPC_UART_TypeDef*)LPC_UART3,
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.irq_rx = UART3_IRQn,
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.clk_offset = 25,
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.pinsel = 0,
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.pinsel_shift = 0,
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.pinsel_af = 2
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}
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};
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#define UART_IRQ_PRIO 1
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#define UART_0_ISR isr_uart0
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#define UART_1_ISR isr_uart3
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#define UART_NUMOF ARRAY_SIZE(uart_config)
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#ifdef __cplusplus
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}
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#endif
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#endif
/* PERIPH_CONF_H */
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vendor_conf.h
CMSIS Cortex-M3 Device Peripheral Access Layer Source File for the NXP LPC17xx Device Series.
uart_conf_t
UART device configuration.
Definition:
periph_cpu.h:166
UART0_IRQn
@ UART0_IRQn
UART0
Definition:
cc2538.h:52
uart_conf_t::dev
cc2538_uart_t * dev
pointer to the used UART device
Definition:
periph_cpu.h:167
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