cfg_timer_tim2.h
Go to the documentation of this file.
1 /*
2  * Copyright (C) 2019 Inria
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser
5  * General Public License v2.1. See the file LICENSE in the top level
6  * directory for more details.
7  */
8 
19 #ifndef CFG_TIMER_TIM2_H
20 #define CFG_TIMER_TIM2_H
21 
22 #include "periph_cpu.h"
23 
24 #ifdef __cplusplus
25 extern "C" {
26 #endif
27 
32 static const timer_conf_t timer_config[] = {
33  {
34  .dev = TIM2,
35 #if defined(CPU_FAM_STM32L0) || defined(CPU_FAM_STM32L1)
36  .max = 0x0000ffff,
37 #else
38  .max = 0xffffffff,
39 #endif
40 #if defined(CPU_FAM_STM32L4) || defined(CPU_FAM_STM32WB) || \
41  defined(CPU_FAM_STM32G4)
42  .rcc_mask = RCC_APB1ENR1_TIM2EN,
43 #elif CPU_FAM_STM32MP1
44  .rcc_mask = RCC_MC_APB1ENSETR_TIM2EN,
45 #else
46  .rcc_mask = RCC_APB1ENR_TIM2EN,
47 #endif
48  .bus = APB1,
49  .irqn = TIM2_IRQn
50  }
51 };
52 
53 #define TIMER_0_ISR isr_tim2
54 
55 #define TIMER_NUMOF ARRAY_SIZE(timer_config)
56 
58 #ifdef __cplusplus
59 }
60 #endif
61 
62 #endif /* CFG_TIMER_TIM2_H */
63 
timer_conf_t
Timer configuration.
Definition: periph_cpu.h:288
timer_conf_t::dev
uint32_t dev
Address of timer base.
Definition: periph_cpu.h:112
APB1
@ APB1
APB1 bus.
Definition: periph_cpu.h:176