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36 #define GPIO_PIN(x, y) ((gpio_t)((x<<4) | y))
44 #define HAVE_GPIO_MODE_T
46 GPIO_IN = (GPIO_DIR_MODE_IN | (GPIO_PIN_TYPE_STD << 4)),
47 GPIO_IN_PD = (GPIO_DIR_MODE_IN | (GPIO_PIN_TYPE_STD_WPD << 4)),
48 GPIO_IN_PU = (GPIO_DIR_MODE_IN | (GPIO_PIN_TYPE_STD_WPU << 4)),
49 GPIO_OUT = (GPIO_DIR_MODE_OUT | (GPIO_PIN_TYPE_STD << 4)),
50 GPIO_OD = (GPIO_DIR_MODE_OUT | (GPIO_PIN_TYPE_OD << 4)),
51 GPIO_OD_PU = (GPIO_DIR_MODE_OUT | (GPIO_PIN_TYPE_OD_WPU << 4)),
60 #define HAVE_GPIO_DIR_T
72 #define HAVE_GPIO_FLANK_T
97 #define HAVE_ADC_RES_T
125 #define SPI_HWCS(x) (UINT_MAX - 1)
150 #define PERIPH_SPI_NEEDS_TRANSFER_BYTE 1
151 #define PERIPH_SPI_NEEDS_TRANSFER_REG 1
152 #define PERIPH_SPI_NEEDS_TRANSFER_REGS 1
153 #define PERIPH_SPI_NEEDS_INIT_CS 1
161 #define HAVE_SPI_CLK_T 1
166 SPI_CLK_4MHZ = 4000000,
176 #define HAVE_SPI_MODE_T 1
@ SPI_CLK_400KHZ
drive the SPI bus with 400KHz
@ SPI_MODE_3
CPOL=1, CPHA=1.
unsigned long ssi_base
SSI base address.
@ SPI_CLK_100KHZ
drive the SPI bus with 100KHz
int irqn
Number of the higher timer IRQ channel.
@ ADC_RES_6BIT
ADC resolution: 6 bit.
@ GPIO_IN_PD
configure as input with pull-down resistor
@ SPI_MODE_0
CPOL=0, CPHA=0.
@ GPIO_OD
configure as output in open-drain mode without pull resistor
@ ADC_RES_14BIT
ADC resolution: 14 bit.
adc_res_t
Possible ADC resolution settings.
uint32_t intbase
Interrupt base of timer.
@ GPIO_OUT
configure as output in push-pull mode
unsigned long clk
pin used for SCK
@ ADC_RES_16BIT
ADC resolution: 16 bit.
spi_mode_t
Available SPI modes, defining the configuration of clock polarity and clock phase.
@ ADC_RES_8BIT
ADC resolution: 8 bit.
@ GPIO_FALLING
emit interrupt on falling flank
@ GPIO_IN_PU
configure as input with pull-up resistor
@ GPIO_RISING
emit interrupt on rising flank
@ SPI_CLK_10MHZ
drive the SPI bus with 10MHz
uint32_t spi_clk_t
SPI clock type.
@ GPIO_IN
configure as input without pull resistor
unsigned long gpio_sysctl
GPIO device in sysctl.
uint32_t sysctl
Address of timer system control.
unsigned long ssi_sysctl
SSI device in sysctl.
@ SPI_CLK_5MHZ
drive the SPI bus with 5MHz
@ GPIO_OD_PU
configure as output in open-drain mode with pull resistor enabled
unsigned long gpio_port
GPIO port.
unsigned long fss
pin used for FSS
uint32_t max
Max tick value of timer.
@ GPIO_BOTH
emit interrupt on both flanks
@ GPIO_DIR_IN
configure pin as input
unsigned long rx
pin used for MISO
unsigned long tx
pin used for MOSI
gpio_mode_t
Available pin modes.
@ ADC_RES_10BIT
ADC resolution: 10 bit.
@ ADC_RES_12BIT
ADC resolution: 12 bit.
unsigned int gpio_t
GPIO type identifier.
@ SPI_CLK_1MHZ
drive the SPI bus with 1MHz
uint32_t dev
Address of timer base.
unsigned long mask
Pin mask.
int channels
Number of channels for the timer.
SPI configuration structure type.
@ SPI_MODE_1
CPOL=0, CPHA=1.
@ GPIO_DIR_OUT
configure pin as output
@ SPI_MODE_2
CPOL=1, CPHA=0.