periph_cpu.h
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1 /*
2  * Copyright (C) 2015 Kaspar Schleiser <kaspar@schleiser.de>
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser
5  * General Public License v2.1. See the file LICENSE in the top level
6  * directory for more details.
7  */
8 
19 #ifndef PERIPH_CPU_H
20 #define PERIPH_CPU_H
21 
22 #ifdef __cplusplus
23 extern "C" {
24 #endif
25 
26 #include <stdint.h>
27 #include "cpu.h"
28 
33 #define __IO volatile
34 
39 #define PM_NUM_MODES (3)
40 
45 typedef struct {
47  __IO uint32_t DIR;
49  uint32_t _reserved[3];
53  __IO uint32_t MASK;
57  __IO uint32_t PIN;
59  __IO uint32_t SET;
61  __IO uint32_t CLR;
62 } FIO_PORT_t;
63 
67 #define FIO_PORTS ((FIO_PORT_t*)FIO_BASE_ADDR)
68 
72 #define PINSEL ((__IO uint32_t *)(PINSEL_BASE_ADDR))
73 
77 #define PINMODE ((__IO uint32_t *)(PINSEL_BASE_ADDR + 0x40))
78 
85 int gpio_init_mux(unsigned pin, unsigned mux);
86 
90 #define GPIO_PIN(port, pin) (port<<5 | pin)
91 
92 #ifndef DOXYGEN
93 #define HAVE_GPIO_FLANK_T
94 typedef enum {
95  GPIO_FALLING = 1,
96  GPIO_RISING = 2,
97  GPIO_BOTH = 3
98 } gpio_flank_t;
99 #endif /* ndef DOXYGEN */
100 
104 typedef struct {
105  lpc23xx_uart_t *dev;
106  uint8_t irq_prio_rx;
107  uint8_t pinsel_rx;
108  uint8_t pinsel_tx;
109  uint32_t pinsel_msk_rx;
110  uint32_t pinsel_msk_tx;
111 } uart_conf_t;
112 
116 typedef struct {
117  lpc23xx_spi_t *dev;
118  uint8_t pinsel_mosi;
119  uint8_t pinsel_miso;
120  uint8_t pinsel_clk;
121  uint32_t pinsel_msk_mosi;
122  uint32_t pinsel_msk_miso;
123  uint32_t pinsel_msk_clk;
124 } spi_conf_t;
125 
129 #define TIMER_CHANNEL_NUMOF (4U)
130 
134 #define PERIPH_TIMER_PROVIDES_SET
135 
140 #define PERIPH_SPI_NEEDS_INIT_CS
141 #define PERIPH_SPI_NEEDS_TRANSFER_BYTE
142 #define PERIPH_SPI_NEEDS_TRANSFER_REG
143 #define PERIPH_SPI_NEEDS_TRANSFER_REGS
144 /* @} */
145 
146 #ifndef DOXYGEN
147 
151 #define HAVE_SPI_CLK_T
152 typedef enum {
153  SPI_CLK_100KHZ = 100,
154  SPI_CLK_400KHZ = 400,
155  SPI_CLK_1MHZ = 1000,
156  SPI_CLK_5MHZ = 5000,
157  SPI_CLK_10MHZ = 10000
158 } spi_clk_t;
160 #endif /* ndef DOXYGEN */
161 
172 #define DAC_NUMOF (1U)
173 
174 #ifndef DOXYGEN
175 
179 #define HAVE_ADC_RES_T
180 typedef enum {
181  ADC_RES_16BIT = 0xff,
182  ADC_RES_14BIT = 0xfe,
183  ADC_RES_12BIT = 0xfd,
184  ADC_RES_10BIT = 0b000,
185  ADC_RES_9BIT = 0b001,
186  ADC_RES_8BIT = 0b010,
187  ADC_RES_7BIT = 0b011,
188  ADC_RES_6BIT = 0b100,
189  ADC_RES_5BIT = 0b101,
190  ADC_RES_4BIT = 0b110,
191  ADC_RES_3BIT = 0b111,
192 } adc_res_t;
194 #endif /* ndef DOXYGEN */
195 
199 typedef struct {
200  uint8_t chan;
201  uint8_t pinsel;
202  uint32_t pinsel_msk;
203 } adc_conf_t;
204 
205 #ifndef DOXYGEN
206 
210 #define HAVE_I2C_SPEED_T
211 typedef enum {
212  I2C_SPEED_LOW = 10000,
213  I2C_SPEED_NORMAL = 100000,
214  I2C_SPEED_FAST = 400000,
215 } i2c_speed_t;
216 /* @} */
217 #endif /* ndef DOXYGEN */
218 
222 typedef struct {
223  lpc23xx_i2c_t *dev;
224  i2c_speed_t speed;
225  uint8_t irq_prio;
226  uint8_t pinsel_sda;
227  uint8_t pinsel_scl;
228  uint32_t pinsel_msk_sda;
229  uint32_t pinsel_msk_scl;
230 } i2c_conf_t;
231 /* @} */
232 
237 #define PERIPH_I2C_NEED_READ_REG
238 #define PERIPH_I2C_NEED_WRITE_REG
239 
246 #if defined(MODULE_PERIPH_RTC) && !defined(RTC_NORMALIZE_COMPAT)
247 #define RTC_NORMALIZE_COMPAT (1)
248 #endif
249 /* @} */
250 
251 #ifdef __cplusplus
252 }
253 #endif
254 
255 #endif /* PERIPH_CPU_H */
256 
SPI_CLK_400KHZ
@ SPI_CLK_400KHZ
drive the SPI bus with 400KHz
Definition: periph_cpu.h:653
SPI_CLK_100KHZ
@ SPI_CLK_100KHZ
drive the SPI bus with 100KHz
Definition: periph_cpu.h:652
ADC_RES_6BIT
@ ADC_RES_6BIT
ADC resolution: 6 bit.
Definition: adc.h:94
uart_conf_t::pinsel_rx
uint8_t pinsel_rx
PINSEL# of the RX pin
Definition: periph_cpu.h:107
spi_conf_t::pinsel_msk_mosi
uint32_t pinsel_msk_mosi
MOSI PINSEL Mask
Definition: periph_cpu.h:121
I2C_SPEED_LOW
@ I2C_SPEED_LOW
low speed mode: ~10 kbit/s
Definition: i2c.h:176
spi_conf_t::dev
lpc23xx_spi_t * dev
pointer to the SPI device
Definition: periph_cpu.h:117
adc_conf_t::pinsel
uint8_t pinsel
PINSEL# of the ADC pin
Definition: periph_cpu.h:201
I2C_SPEED_NORMAL
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition: i2c.h:177
i2c_conf_t::pinsel_scl
uint8_t pinsel_scl
PINSEL# of the SCL pin
Definition: periph_cpu.h:227
ADC_RES_14BIT
@ ADC_RES_14BIT
ADC resolution: 14 bit.
Definition: adc.h:98
adc_res_t
adc_res_t
Possible ADC resolution settings.
Definition: adc.h:93
adc_conf_t::pinsel_msk
uint32_t pinsel_msk
PINSEL Mask for ADC pin.
Definition: periph_cpu.h:202
uart_conf_t::pinsel_msk_tx
uint32_t pinsel_msk_tx
TX PINSEL Mask
Definition: periph_cpu.h:110
spi_conf_t::pinsel_clk
uint8_t pinsel_clk
PINSEL# of the CLK pin
Definition: periph_cpu.h:120
spi_conf_t::pinsel_mosi
uint8_t pinsel_mosi
PINSEL# of the MOSI pin
Definition: periph_cpu.h:118
ADC_RES_16BIT
@ ADC_RES_16BIT
ADC resolution: 16 bit.
Definition: adc.h:99
i2c_conf_t::pinsel_msk_sda
uint32_t pinsel_msk_sda
SDA PINSEL Mask
Definition: periph_cpu.h:228
i2c_speed_t
i2c_speed_t
Default mapping of I2C bus speed values.
Definition: i2c.h:175
uart_conf_t::pinsel_tx
uint8_t pinsel_tx
PINSEL# of the TX pin
Definition: periph_cpu.h:108
FIO_PORT_t::SET
__IO uint32_t SET
Output pins are set to high by setting the corresponding bit.
Definition: periph_cpu.h:59
ADC_RES_8BIT
@ ADC_RES_8BIT
ADC resolution: 8 bit.
Definition: adc.h:95
GPIO_FALLING
@ GPIO_FALLING
emit interrupt on falling flank
Definition: periph_cpu.h:81
__IO
#define __IO
LPC2387 MCU defines.
Definition: periph_cpu.h:33
GPIO_RISING
@ GPIO_RISING
emit interrupt on rising flank
Definition: periph_cpu.h:82
FIO_PORT_t::DIR
__IO uint32_t DIR
Direction: Output if corresponding bit is set, otherwise input.
Definition: periph_cpu.h:47
SPI_CLK_10MHZ
@ SPI_CLK_10MHZ
drive the SPI bus with 10MHz
Definition: periph_cpu.h:656
spi_clk_t
uint32_t spi_clk_t
SPI clock type.
Definition: periph_cpu.h:662
gpio_init_mux
void gpio_init_mux(gpio_t pin, uint8_t over, uint8_t sel, uint8_t func)
Configure an alternate function for the given pin.
uart_conf_t
UART device configuration.
Definition: periph_cpu.h:166
SPI_CLK_5MHZ
@ SPI_CLK_5MHZ
drive the SPI bus with 5MHz
Definition: periph_cpu.h:655
uart_conf_t::irq_prio_rx
uint8_t irq_prio_rx
priority of the RX IRQ
Definition: periph_cpu.h:106
gpio_flank_t
gpio_flank_t
Definition: periph_cpu.h:80
spi_conf_t::pinsel_msk_miso
uint32_t pinsel_msk_miso
MISO PINSEL Mask
Definition: periph_cpu.h:122
i2c_conf_t::irq_prio
uint8_t irq_prio
priority of the I2C IRQ
Definition: periph_cpu.h:225
GPIO_BOTH
@ GPIO_BOTH
emit interrupt on both flanks
Definition: periph_cpu.h:83
i2c_conf_t::pinsel_sda
uint8_t pinsel_sda
PINSEL# of the SDA pin
Definition: periph_cpu.h:226
adc_conf_t
gpio_t adc_conf_t
ADC configuration wrapper.
Definition: periph_cpu.h:315
uart_conf_t::dev
lpc23xx_uart_t * dev
pointer to the UART device
Definition: periph_cpu.h:105
ADC_RES_10BIT
@ ADC_RES_10BIT
ADC resolution: 10 bit.
Definition: adc.h:96
ADC_RES_12BIT
@ ADC_RES_12BIT
ADC resolution: 12 bit.
Definition: adc.h:97
i2c_conf_t::pinsel_msk_scl
uint32_t pinsel_msk_scl
SCL PINSEL Mask
Definition: periph_cpu.h:229
FIO_PORT_t::MASK
__IO uint32_t MASK
Set bits to ignore corresponding bits when accessing PIN, SET or CLR register of this port.
Definition: periph_cpu.h:53
FIO_PORT_t::PIN
__IO uint32_t PIN
The current state of each pin of this port is accessible here (regardless of direction): If bit is se...
Definition: periph_cpu.h:57
spi_conf_t::pinsel_msk_clk
uint32_t pinsel_msk_clk
CLK PINSEL Mask
Definition: periph_cpu.h:123
uart_conf_t::pinsel_msk_rx
uint32_t pinsel_msk_rx
RX PINSEL Mask
Definition: periph_cpu.h:109
i2c_conf_t
I2C configuration options.
Definition: periph_cpu.h:128
SPI_CLK_1MHZ
@ SPI_CLK_1MHZ
drive the SPI bus with 1MHz
Definition: periph_cpu.h:654
I2C_SPEED_FAST
@ I2C_SPEED_FAST
fast mode: ~400 kbit/s
Definition: i2c.h:178
i2c_conf_t::dev
lpc23xx_i2c_t * dev
pointer to the I2C device
Definition: periph_cpu.h:223
FIO_PORT_t
Fast GPIO register definition struct.
Definition: periph_cpu.h:45
spi_conf_t
SPI configuration structure type.
Definition: periph_cpu.h:273
FIO_PORT_t::CLR
__IO uint32_t CLR
Output pins are set to low by setting the corresponding bit.
Definition: periph_cpu.h:61
spi_conf_t::pinsel_miso
uint8_t pinsel_miso
PINSEL# of the MISO pin
Definition: periph_cpu.h:119