periph_cpu.h File Reference

CPU specific definitions for internal peripheral handling. More...

Detailed Description

CPU specific definitions for internal peripheral handling.

CPU specific definitions for internal peripheral handling

Author

Benjamin Valentin benja.nosp@m.min..nosp@m.valen.nosp@m.tin@.nosp@m.ml-pa.nosp@m..com

Definition in file periph_cpu.h.

#include <limits.h>
#include "macros/units.h"
#include "periph_cpu_common.h"

Include dependency graph for periph_cpu.h:

Go to the source code of this file.

Data Structures
struct	sam0_aux_cfg_mapping
	NVM User Row Mapping - Dedicated Entries Config values will be applied at power-on. More...

Macros
#define	SPI_HWCS(x)   (UINT_MAX - 1)
	Override SPI hardware chip select macro. More...
#define	DAC_RES_BITS   (12)
	The MCU has a 12 bit DAC.
#define	DAC_NUMOF   (2)
	The MCU has two DAC outputs.

Variables
static const gpio_t	rtc_tamper_pins [RTC_NUM_OF_TAMPERS]
	RTC input pins that can be used for tamper detection and wake from Deep Sleep. More...
#define	SAM0_DFLL_FREQ_HZ   MHZ(48)
	DFLL runs at at fixed frequency of 48 MHz.
#define	SAM0_XOSC_FREQ_HZ   (XOSC0_FREQUENCY ? XOSC0_FREQUENCY : XOSC1_FREQUENCY)
	 * More...
#define	SAM0_DPLL_FREQ_MIN_HZ   MHZ(96)
	DPLL must run with at least 96 MHz.
#define	SAM0_DPLL_FREQ_MAX_HZ   MHZ(20)
	DPLL frequency must not exceed 200 MHz.

Power mode configuration
#define	PM_NUM_MODES   (3)

SAMD5x GCLK definitions
enum	{ SAM0_GCLK_MAIN = 0, SAM0_GCLK_32KHZ, SAM0_GCLK_TIMER, SAM0_GCLK_PERIPH }

GCLK compatibility definitions
#define	SAM0_GCLK_8MHZ   SAM0_GCLK_TIMER
#define	SAM0_GCLK_48MHZ   SAM0_GCLK_PERIPH

Real time counter configuration
#define	RTT_MAX_VALUE   (0xffffffff)
#define	RTT_CLOCK_FREQUENCY   (32768U) /* in Hz */
#define	RTT_MIN_FREQUENCY   (RTT_CLOCK_FREQUENCY / 1024U) /* in Hz */
#define	RTT_MAX_FREQUENCY   (RTT_CLOCK_FREQUENCY) /* in Hz */

Macro Definition Documentation

SAM0_XOSC_FREQ_HZ

#define SAM0_XOSC_FREQ_HZ   (XOSC0_FREQUENCY ? XOSC0_FREQUENCY : XOSC1_FREQUENCY)

 *

XOSC is used to generate a fixed frequency of 48 MHz 

Definition at line 40 of file periph_cpu.h.

SPI_HWCS

#define SPI_HWCS

(

x

)

(UINT_MAX - 1)

Override SPI hardware chip select macro.

As of now, we do not support HW CS, so we always set it to a fixed value

Definition at line 84 of file periph_cpu.h.

Enumeration Type Documentation

anonymous enum

anonymous enum

Enumerator
SAM0_GCLK_MAIN	120 MHz main clock
SAM0_GCLK_32KHZ	32 kHz clock
SAM0_GCLK_TIMER	4-8 MHz clock for xTimer
SAM0_GCLK_PERIPH	12-48 MHz (DFLL) clock

Definition at line 63 of file periph_cpu.h.

Variable Documentation

rtc_tamper_pins

const gpio_t rtc_tamper_pins[RTC_NUM_OF_TAMPERS]

static

Initial value:

= {
    GPIO_PIN(PB, 0), GPIO_PIN(PB, 2), GPIO_PIN(PA, 2),
    GPIO_PIN(PC, 0), GPIO_PIN(PC, 1)
}

RTC input pins that can be used for tamper detection and wake from Deep Sleep.

Definition at line 123 of file periph_cpu.h.