periph_conf.h
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1  /*
2  * Copyright (C) 2014-2015,2017 Freie Universität Berlin
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser
5  * General Public License v2.1. See the file LICENSE in the top level
6  * directory for more details.
7  */
8 
21 #ifndef PERIPH_CONF_H
22 #define PERIPH_CONF_H
23 
24 #include "periph_cpu.h"
25 
26 #ifdef __cplusplus
27 extern "C" {
28 #endif
29 
34 /* targeted system core clock */
35 #define CLOCK_CORECLOCK (84000000UL)
36 /* external oscillator clock */
37 #define CLOCK_EXT_OSC (12000000UL)
38 /* define PLL configuration
39  *
40  * The values must fulfill this equation:
41  * CORECLOCK = (EXT_OCS / PLL_DIV) * (PLL_MUL + 1)
42  */
43 #define CLOCK_PLL_MUL (83)
44 #define CLOCK_PLL_DIV (12)
45 
46 /* number of wait states before flash read and write operations */
47 #define CLOCK_FWS (4) /* 4 is save for 84MHz */
48 
56 #ifndef CLOCK_SCLK_XTAL
57 #define CLOCK_SCLK_XTAL (0)
58 #endif
59 
64 static const timer_conf_t timer_config[] = {
65  { .dev = TC0, .id_ch0 = ID_TC0 },
66  { .dev = TC1, .id_ch0 = ID_TC3 }
67 };
68 
69 #define TIMER_0_ISR isr_tc0
70 #define TIMER_1_ISR isr_tc3
71 
72 #define TIMER_NUMOF ARRAY_SIZE(timer_config)
73 
79 #define RTT_FREQUENCY (1U) /* 1Hz */
80 
86 static const uart_conf_t uart_config[] = {
87  {
88  .dev = (Uart *)UART,
89  .rx_pin = GPIO_PIN(PA, 8),
90  .tx_pin = GPIO_PIN(PA, 9),
91  .mux = GPIO_MUX_A,
92  .pmc_id = ID_UART,
93  .irqn = UART_IRQn
94  },
95  {
96  .dev = (Uart *)USART0,
97  .rx_pin = GPIO_PIN(PA, 10),
98  .tx_pin = GPIO_PIN(PA, 11),
99  .mux = GPIO_MUX_A,
100  .pmc_id = ID_USART0,
101  .irqn = USART0_IRQn
102  },
103  {
104  .dev = (Uart *)USART1,
105  .rx_pin = GPIO_PIN(PA, 12),
106  .tx_pin = GPIO_PIN(PA, 13),
107  .mux = GPIO_MUX_A,
108  .pmc_id = ID_USART1,
109  .irqn = USART1_IRQn
110  },
111  {
112  .dev = (Uart *)USART3,
113  .rx_pin = GPIO_PIN(PD, 5),
114  .tx_pin = GPIO_PIN(PD, 4),
115  .mux = GPIO_MUX_B,
116  .pmc_id = ID_USART3,
117  .irqn = USART3_IRQn
118  }
119 };
120 
121 /* define interrupt vectors */
122 #define UART_0_ISR isr_uart
123 #define UART_1_ISR isr_usart0
124 #define UART_2_ISR isr_usart1
125 #define UART_3_ISR isr_usart3
126 
127 #define UART_NUMOF ARRAY_SIZE(uart_config)
128 
134 static const spi_conf_t spi_config[] = {
135  {
136  .dev = SPI0,
137  .id = ID_SPI0,
138  .clk = GPIO_PIN(PA, 27),
139  .mosi = GPIO_PIN(PA, 26),
140  .miso = GPIO_PIN(PA, 25),
141  .mux = GPIO_MUX_A
142  }
143 };
144 
145 #define SPI_NUMOF ARRAY_SIZE(spi_config)
146 
152 static const pwm_chan_conf_t pwm_chan[] = {
153  { .pin = GPIO_PIN(PC, 21), .hwchan = 4 },
154  { .pin = GPIO_PIN(PC, 22), .hwchan = 5 },
155  { .pin = GPIO_PIN(PC, 23), .hwchan = 6 },
156  { .pin = GPIO_PIN(PC, 24), .hwchan = 7 }
157 };
158 
159 #define PWM_NUMOF (1U)
160 #define PWM_CHAN_NUMOF ARRAY_SIZE(pwm_chan)
161 
163 #ifdef __cplusplus
164 }
165 #endif
166 
167 #endif /* PERIPH_CONF_H */
168 
PD
@ PD
port D
Definition: periph_cpu_common.h:91
pwm_chan_conf_t
PWM channel configuration.
Definition: periph_cpu.h:281
uart_conf_t
UART device configuration.
Definition: periph_cpu.h:166
GPIO_MUX_A
@ GPIO_MUX_A
select peripheral function A
Definition: periph_cpu_common.h:136
GPIO_MUX_B
@ GPIO_MUX_B
select peripheral function B
Definition: periph_cpu_common.h:137
uart_conf_t::dev
cc2538_uart_t * dev
pointer to the used UART device
Definition: periph_cpu.h:167
timer_conf_t
Timer configuration.
Definition: periph_cpu.h:288
GPIO_PIN
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:35
pwm_chan_conf_t::pin
gpio_t pin
pin used for pwm
Definition: periph_cpu.h:283
PC
@ PC
port C
Definition: periph_cpu_common.h:90
PA
@ PA
port A
Definition: periph_cpu_common.h:88
timer_conf_t::dev
uint32_t dev
Address of timer base.
Definition: periph_cpu.h:112
spi_conf_t::dev
SPI_Type * dev
SPI device to use.
Definition: periph_cpu.h:465
spi_conf_t
SPI configuration structure type.
Definition: periph_cpu.h:273