Configuration of CPU peripherals for Arduino Zero board and clones. More...
Configuration of CPU peripherals for Arduino Zero board and clones.
Definition in file periph_conf.h.
#include <stdint.h>
#include "cpu.h"
#include "periph_cpu.h"
Go to the source code of this file.
#define | CLOCK_USE_PLL (1) |
External oscillator and clock configuration. More... | |
#define | CLOCK_PLL_MUL (47U) /* must be >= 31 & <= 95 */ |
#define | CLOCK_PLL_DIV (1U) /* adjust to your needs */ |
#define | CLOCK_CORECLOCK (((CLOCK_PLL_MUL + 1) * 1000000U) / CLOCK_PLL_DIV) |
Timer peripheral configuration | |
#define | TIMER_0_MAX_VALUE 0xffff |
#define | TIMER_0_ISR isr_tc3 |
#define | TIMER_1_ISR isr_tc4 |
#define | TIMER_NUMOF ARRAY_SIZE(timer_config) |
static const tc32_conf_t | timer_config [] |
UART configuration | |
#define | UART_0_ISR isr_sercom5 |
#define | UART_1_ISR isr_sercom0 |
#define | UART_NUMOF ARRAY_SIZE(uart_config) |
static const uart_conf_t | uart_config [] |
PWM configuration | |
#define | PWM_0_EN 1 |
#define | PWM_1_EN 1 |
#define | PWM_NUMOF ARRAY_SIZE(pwm_config) |
static const pwm_conf_chan_t | pwm_chan0_config [] |
static const pwm_conf_chan_t | pwm_chan1_config [] |
static const pwm_conf_t | pwm_config [] |
ADC configuration | |
#define | ADC_PRESCALER ADC_CTRLB_PRESCALER_DIV512 |
#define | ADC_NEG_INPUT ADC_INPUTCTRL_MUXNEG_GND |
#define | ADC_GAIN_FACTOR_DEFAULT ADC_INPUTCTRL_GAIN_1X |
#define | ADC_REF_DEFAULT ADC_REFCTRL_REFSEL_INT1V |
#define | ADC_NUMOF ARRAY_SIZE(adc_channels) |
static const adc_conf_chan_t | adc_channels [] |
SPI configuration | |
#define | SPI_NUMOF ARRAY_SIZE(spi_config) |
static const spi_conf_t | spi_config [] |
I2C configuration | |
#define | I2C_NUMOF ARRAY_SIZE(i2c_config) |
static const i2c_conf_t | i2c_config [] |
RTT configuration | |
#define | RTT_FREQUENCY (32768U) /* in Hz. For changes see `rtt.c` */ |
USB peripheral configuration | |
static const sam0_common_usb_config_t | sam_usbdev_config [] |
#define CLOCK_USE_PLL (1) |
External oscillator and clock configuration.
For selection of the used CORECLOCK, we have implemented two choices:
The PLL option allows for the usage of a wider frequency range and a more stable clock with less jitter. This is why we use this option as default.
The target frequency is computed from the PLL multiplier and the PLL divisor. Use the following formula to compute your values:
CORECLOCK = ((PLL_MUL + 1) * 1MHz) / PLL_DIV
NOTE: The PLL circuit does not run with less than 32MHz while the maximum PLL frequency is 96MHz. So PLL_MULL must be between 31 and 95!
The internal Oscillator used directly can lead to a slightly better power efficiency to the cost of a less stable clock. Use this option when you know what you are doing! The actual core frequency is adjusted as follows:
CORECLOCK = 8MHz / DIV
NOTE: A core clock frequency below 1MHz is not recommended
Definition at line 67 of file periph_conf.h.
|
static |
Definition at line 215 of file periph_conf.h.
|
static |
Definition at line 255 of file periph_conf.h.
|
static |
Definition at line 174 of file periph_conf.h.
|
static |
Definition at line 182 of file periph_conf.h.
|
static |
Definition at line 190 of file periph_conf.h.
|
static |
Definition at line 283 of file periph_conf.h.
|
static |
Definition at line 232 of file periph_conf.h.
|
static |
Definition at line 87 of file periph_conf.h.
|
static |
Definition at line 127 of file periph_conf.h.