periph_conf.h
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1 /*
2  * Copyright (C) 2014 Freie Universität Berlin
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser General
5  * Public License v2.1. See the file LICENSE in the top level directory for more
6  * details.
7  */
8 
21 #ifndef PERIPH_CONF_H
22 #define PERIPH_CONF_H
23 
24 /* This board provides an HSE */
25 #ifndef CONFIG_BOARD_HAS_HSE
26 #define CONFIG_BOARD_HAS_HSE 1
27 #endif
28 
29 /* The HSE provides a 16MHz clock */
30 #define CLOCK_HSE MHZ(16)
31 
32 #include "periph_cpu.h"
33 #include "clk_conf.h"
34 
35 #ifdef __cplusplus
36 extern "C" {
37 #endif
38 
43 static const timer_conf_t timer_config[] = {
44  {
45  .dev = TIM2,
46  .max = 0xffffffff,
47  .rcc_mask = RCC_APB1ENR_TIM2EN,
48  .bus = APB1,
49  .irqn = TIM2_IRQn
50  },
51  {
52  .dev = TIM5,
53  .max = 0xffffffff,
54  .rcc_mask = RCC_APB1ENR_TIM5EN,
55  .bus = APB1,
56  .irqn = TIM5_IRQn
57  }
58 };
59 
60 #define TIMER_0_ISR isr_tim2
61 #define TIMER_1_ISR isr_tim5
62 
63 #define TIMER_NUMOF ARRAY_SIZE(timer_config)
64 
70 static const uart_conf_t uart_config[] = {
71  {
72  .dev = USART6,
73  .rcc_mask = RCC_APB2ENR_USART6EN,
74  .rx_pin = GPIO_PIN(PORT_C, 7),
75  .tx_pin = GPIO_PIN(PORT_C, 6),
76  .rx_af = GPIO_AF8,
77  .tx_af = GPIO_AF8,
78  .bus = APB2,
79  .irqn = USART6_IRQn,
80 #ifdef MODULE_PERIPH_DMA
81  .dma = DMA_STREAM_UNDEF,
82  .dma_chan = UINT8_MAX,
83 #endif
84  }
85 };
86 
87 #define UART_0_ISR (isr_usart6)
88 
89 #define UART_NUMOF ARRAY_SIZE(uart_config)
90 
92 #ifdef __cplusplus
93 }
94 #endif
95 
96 #endif /* PERIPH_CONF_H */
97 
GPIO_AF8
@ GPIO_AF8
use alternate function 8
Definition: periph_cpu_common.h:94
PORT_C
@ PORT_C
port C
Definition: periph_cpu.h:38
uart_conf_t
UART device configuration.
Definition: periph_cpu.h:166
uart_conf_t::dev
cc2538_uart_t * dev
pointer to the used UART device
Definition: periph_cpu.h:167
timer_conf_t
Timer configuration.
Definition: periph_cpu.h:288
GPIO_PIN
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:35
APB2
@ APB2
APB2 bus.
Definition: periph_cpu.h:177
timer_conf_t::dev
uint32_t dev
Address of timer base.
Definition: periph_cpu.h:112
APB1
@ APB1
APB1 bus.
Definition: periph_cpu.h:176