periph_conf.h File Reference
#include "periph_cpu.h"
#include "clk_conf.h"
#include "cfg_i2c1_pb8_pb9.h"
#include "cfg_usb_otg_fs.h"
#include "mii.h"
+ Include dependency graph for periph_conf.h:

Go to the source code of this file.

Peripheral MCU configuration for the nucleo-f207zg board

Author
Vincent Dupont vince.nosp@m.nt@o.nosp@m.takey.nosp@m.s.co.nosp@m.m
Aurelien Gonce aurel.nosp@m.ien..nosp@m.gonce.nosp@m.@alt.nosp@m.ran.f.nosp@m.r
Toon Stegen toon..nosp@m.steg.nosp@m.en@al.nosp@m.tran.nosp@m..com
#define CONFIG_BOARD_HAS_LSE   1
 
#define CONFIG_BOARD_HAS_HSE   1
 

DMA streams configuration

#define DMA_0_ISR   isr_dma2_stream2
 
#define DMA_1_ISR   isr_dma2_stream3
 
#define DMA_2_ISR   isr_dma1_stream3
 
#define DMA_3_ISR   isr_dma1_stream4
 
#define DMA_4_ISR   isr_dma2_stream6
 
#define DMA_5_ISR   isr_dma1_stream6
 
#define DMA_6_ISR   isr_dma2_stream0
 
#define DMA_NUMOF   ARRAY_SIZE(dma_config)
 
static const dma_conf_t dma_config []
 

PWM configuration

#define PWM_NUMOF   ARRAY_SIZE(pwm_config)
 
static const pwm_conf_t pwm_config []
 

Timer configuration

#define TIMER_0_ISR   isr_tim2
 
#define TIMER_1_ISR   isr_tim5
 
#define TIMER_NUMOF   ARRAY_SIZE(timer_config)
 
static const timer_conf_t timer_config []
 

UART configuration

#define UART_0_ISR   (isr_usart3)
 
#define UART_1_ISR   (isr_usart6)
 
#define UART_2_ISR   (isr_usart2)
 
#define UART_NUMOF   ARRAY_SIZE(uart_config)
 
static const uart_conf_t uart_config []
 

SPI configuration

#define SPI_NUMOF   ARRAY_SIZE(spi_config)
 
static const spi_conf_t spi_config []
 

ADC configuration

We need to define the following fields: PIN, device (ADCx), channel

#define ADC_NUMOF   ARRAY_SIZE(adc_config)
 
static const adc_conf_t adc_config []
 

ETH configuration

#define ETH_DMA_ISR   isr_dma2_stream0
 
static const eth_conf_t eth_config
 

Variable Documentation

◆ adc_config

const adc_conf_t adc_config[]
static
Initial value:
= {
{GPIO_PIN(PORT_A, 3), 0, 3},
{GPIO_PIN(PORT_C, 0), 1, 0}
}

Definition at line 237 of file periph_conf.h.

◆ dma_config

const dma_conf_t dma_config[]
static
Initial value:
= {
{ .stream = 10 },
{ .stream = 11 },
{ .stream = 3 },
{ .stream = 4 },
{ .stream = 14 },
{ .stream = 6 },
{ .stream = 8 },
}

Definition at line 48 of file periph_conf.h.

◆ eth_config

const eth_conf_t eth_config
static
Initial value:
= {
.mode = RMII,
.addr = { 0 },
.dma = 6,
.dma_chan = 8,
.phy_addr = 0x00,
.pins = {
}
}

Definition at line 249 of file periph_conf.h.

◆ pwm_config

const pwm_conf_t pwm_config[]
static
Initial value:
= {
{
.dev = TIM1,
.rcc_mask = RCC_APB2ENR_TIM1EN,
.chan = { { .pin = GPIO_PIN(PORT_E, 9) , .cc_chan = 0},
{ .pin = GPIO_PIN(PORT_E, 11) , .cc_chan = 1},
{ .pin = GPIO_PIN(PORT_E, 13) , .cc_chan = 2},
{ .pin = GPIO_UNDEF, .cc_chan = 0} },
.af = GPIO_AF1,
.bus = APB2
},
{
.dev = TIM4,
.rcc_mask = RCC_APB1ENR_TIM4EN,
.chan = { { .pin = GPIO_PIN(PORT_D, 15) , .cc_chan = 3},
{ .pin = GPIO_UNDEF, .cc_chan = 0},
{ .pin = GPIO_UNDEF, .cc_chan = 0},
{ .pin = GPIO_UNDEF, .cc_chan = 0} },
.af = GPIO_AF2,
.bus = APB1
},
}

Definition at line 73 of file periph_conf.h.

◆ timer_config

const timer_conf_t timer_config[]
static
Initial value:
= {
{
.dev = TIM2,
.max = 0xffffffff,
.rcc_mask = RCC_APB1ENR_TIM2EN,
.bus = APB1,
.irqn = TIM2_IRQn
},
{
.dev = TIM5,
.max = 0xffffffff,
.rcc_mask = RCC_APB1ENR_TIM5EN,
.bus = APB1,
.irqn = TIM5_IRQn
}
}

Definition at line 103 of file periph_conf.h.

PORT_E
@ PORT_E
port E
Definition: periph_cpu.h:40
PORT_C
@ PORT_C
port C
Definition: periph_cpu.h:38
PORT_A
@ PORT_A
port A
Definition: periph_cpu.h:36
PORT_D
@ PORT_D
port D
Definition: periph_cpu.h:39
GPIO_UNDEF
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
Definition: periph_cpu_common.h:52
GPIO_AF1
@ GPIO_AF1
use alternate function 1
Definition: periph_cpu_common.h:87
MII_BMCR_FULL_DPLX
#define MII_BMCR_FULL_DPLX
Set for full duplex.
Definition: mii.h:68
MII_BMCR_SPEED_100
#define MII_BMCR_SPEED_100
Set speed to 100 Mbps.
Definition: mii.h:72
GPIO_PIN
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:35
RMII
@ RMII
Configuration for RMII.
Definition: periph_cpu.h:1043
APB2
@ APB2
APB2 bus.
Definition: periph_cpu.h:177
GPIO_AF2
@ GPIO_AF2
use alternate function 2
Definition: periph_cpu_common.h:88
PORT_B
@ PORT_B
port B
Definition: periph_cpu.h:37
PORT_G
@ PORT_G
port G
Definition: periph_cpu.h:42
APB1
@ APB1
APB1 bus.
Definition: periph_cpu.h:176