periph_conf.h File Reference

Peripheral MCU configuration for the nucleo144-l496 board. More...

Detailed Description

Peripheral MCU configuration for the nucleo144-l496 board.

Author
Alexandre Abadie alexa.nosp@m.ndre.nosp@m..abad.nosp@m.ie@i.nosp@m.nria..nosp@m.fr

Definition in file periph_conf.h.

#include "periph_cpu.h"
#include "clk_conf.h"
#include "cfg_i2c1_pb8_pb9.h"
#include "cfg_rtt_default.h"
+ Include dependency graph for periph_conf.h:

Go to the source code of this file.

#define CONFIG_BOARD_HAS_LSE   1
 

Timer configuration

#define TIMER_0_ISR   isr_tim2
 
#define TIMER_1_ISR   isr_tim5
 
#define TIMER_NUMOF   ARRAY_SIZE(timer_config)
 
static const timer_conf_t timer_config []
 

UART configuration

#define UART_0_ISR   (isr_lpuart1)
 
#define UART_1_ISR   (isr_usart3)
 
#define UART_1_DMA_ISR   (isr_dma1_stream5)
 
#define UART_NUMOF   ARRAY_SIZE(uart_config)
 
static const uart_conf_t uart_config []
 

PWM configuration

#define PWM_NUMOF   ARRAY_SIZE(pwm_config)
 
static const pwm_conf_t pwm_config []
 

SPI configuration

#define SPI_NUMOF   ARRAY_SIZE(spi_config)
 
static const spi_conf_t spi_config []
 

Variable Documentation

◆ pwm_config

const pwm_conf_t pwm_config[]
static
Initial value:
= {
{
.dev = TIM1,
.rcc_mask = RCC_APB2ENR_TIM1EN,
.chan = { { .pin = GPIO_PIN(PORT_E, 9) , .cc_chan = 0},
{ .pin = GPIO_PIN(PORT_E, 11) , .cc_chan = 1},
{ .pin = GPIO_PIN(PORT_E, 13) , .cc_chan = 2},
{ .pin = GPIO_UNDEF, .cc_chan = 0} },
.af = GPIO_AF1,
.bus = APB2
},
{
.dev = TIM4,
.rcc_mask = RCC_APB1ENR1_TIM4EN,
.chan = { { .pin = GPIO_PIN(PORT_D, 15) , .cc_chan = 3},
{ .pin = GPIO_UNDEF, .cc_chan = 0},
{ .pin = GPIO_UNDEF, .cc_chan = 0},
{ .pin = GPIO_UNDEF, .cc_chan = 0} },
.af = GPIO_AF2,
.bus = APB1
},
}

Definition at line 109 of file periph_conf.h.

◆ spi_config

const spi_conf_t spi_config[]
static
Initial value:
= {
{
.dev = SPI1,
.mosi_pin = GPIO_PIN(PORT_A, 7),
.miso_pin = GPIO_PIN(PORT_A, 6),
.sclk_pin = GPIO_PIN(PORT_A, 5),
.cs_pin = GPIO_UNDEF,
.mosi_af = GPIO_AF5,
.miso_af = GPIO_AF5,
.sclk_af = GPIO_AF5,
.cs_af = GPIO_AF5,
.rccmask = RCC_APB2ENR_SPI1EN,
.apbbus = APB2
}
}

Definition at line 139 of file periph_conf.h.

◆ timer_config

const timer_conf_t timer_config[]
static
Initial value:
= {
{
.dev = TIM2,
.max = 0xffffffff,
.rcc_mask = RCC_APB1ENR1_TIM2EN,
.bus = APB1,
.irqn = TIM2_IRQn
},
{
.dev = TIM5,
.max = 0xffffffff,
.rcc_mask = RCC_APB1ENR1_TIM5EN,
.bus = APB1,
.irqn = TIM5_IRQn
},
}

Definition at line 40 of file periph_conf.h.

◆ uart_config

const uart_conf_t uart_config[]
static
Initial value:
= {
{
.dev = LPUART1,
.rcc_mask = RCC_APB1ENR2_LPUART1EN,
.rx_pin = GPIO_PIN(PORT_G, 8),
.tx_pin = GPIO_PIN(PORT_G, 7),
.rx_af = GPIO_AF8,
.tx_af = GPIO_AF8,
.bus = APB12,
.irqn = LPUART1_IRQn,
.type = STM32_LPUART,
.clk_src = 0,
},
{
.dev = USART3,
.rcc_mask = RCC_APB1ENR1_USART3EN,
.rx_pin = GPIO_PIN(PORT_D, 9),
.tx_pin = GPIO_PIN(PORT_D, 8),
.rx_af = GPIO_AF7,
.tx_af = GPIO_AF7,
.bus = APB1,
.irqn = USART3_IRQn,
.type = STM32_USART,
.clk_src = 0,
}
}

Definition at line 67 of file periph_conf.h.

GPIO_AF8
@ GPIO_AF8
use alternate function 8
Definition: periph_cpu_common.h:94
PORT_E
@ PORT_E
port E
Definition: periph_cpu.h:40
GPIO_AF5
@ GPIO_AF5
use alternate function 5
Definition: periph_cpu_common.h:91
PORT_A
@ PORT_A
port A
Definition: periph_cpu.h:36
PORT_D
@ PORT_D
port D
Definition: periph_cpu.h:39
GPIO_UNDEF
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
Definition: periph_cpu_common.h:52
STM32_USART
@ STM32_USART
STM32 USART module type.
Definition: periph_cpu.h:583
GPIO_AF1
@ GPIO_AF1
use alternate function 1
Definition: periph_cpu_common.h:87
GPIO_AF7
@ GPIO_AF7
use alternate function 7
Definition: periph_cpu_common.h:93
GPIO_PIN
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:35
APB2
@ APB2
APB2 bus.
Definition: periph_cpu.h:177
GPIO_AF2
@ GPIO_AF2
use alternate function 2
Definition: periph_cpu_common.h:88
STM32_LPUART
@ STM32_LPUART
STM32 Low-power UART (LPUART) module type.
Definition: periph_cpu.h:584
PORT_G
@ PORT_G
port G
Definition: periph_cpu.h:42
APB1
@ APB1
APB1 bus.
Definition: periph_cpu.h:176