cfg_spi_default.h
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1 /*
2  * Copyright (C) 2016 Kees Bakker, SODAQ
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser
5  * General Public License v2.1. See the file LICENSE in the top level
6  * directory for more details.
7  */
8 
19 #ifndef CFG_SPI_DEFAULT_H
20 #define CFG_SPI_DEFAULT_H
21 
22 #include <stdint.h>
23 
24 #include "cpu.h"
25 #include "periph_cpu.h"
26 
27 #ifdef __cplusplus
28 extern "C" {
29 #endif
30 
35 static const spi_conf_t spi_config[] = {
36  {
37  .dev = &SERCOM3->SPI,
38  .miso_pin = GPIO_PIN(PA, 22),
39  .mosi_pin = GPIO_PIN(PA, 20),
40  .clk_pin = GPIO_PIN(PA, 21),
41  .miso_mux = GPIO_MUX_C,
42  .mosi_mux = GPIO_MUX_D,
43  .clk_mux = GPIO_MUX_D,
44  .miso_pad = SPI_PAD_MISO_0,
45  .mosi_pad = SPI_PAD_MOSI_2_SCK_3,
46  .gclk_src = SAM0_GCLK_MAIN,
47 #ifdef MODULE_PERIPH_DMA
48  .tx_trigger = SERCOM3_DMAC_ID_TX,
49  .rx_trigger = SERCOM3_DMAC_ID_RX,
50 #endif
51  },
52 };
53 
54 #define SPI_NUMOF ARRAY_SIZE(spi_config)
55 
57 #ifdef __cplusplus
58 }
59 #endif
60 
61 #endif /* CFG_SPI_DEFAULT_H */
62 
SAM0_GCLK_MAIN
@ SAM0_GCLK_MAIN
48 MHz main clock
Definition: periph_cpu.h:59
SPI_PAD_MISO_0
@ SPI_PAD_MISO_0
use pad 0 for MISO line
Definition: periph_cpu_common.h:327
GPIO_MUX_C
@ GPIO_MUX_C
select peripheral function C
Definition: periph_cpu_common.h:138
SPI_PAD_MOSI_2_SCK_3
@ SPI_PAD_MOSI_2_SCK_3
use pad 2 for MOSI, pad 3 for SCK
Definition: periph_cpu_common.h:338
GPIO_PIN
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:35
GPIO_MUX_D
@ GPIO_MUX_D
select peripheral function D
Definition: periph_cpu_common.h:139
PA
@ PA
port A
Definition: periph_cpu_common.h:88
spi_conf_t::dev
SPI_Type * dev
SPI device to use.
Definition: periph_cpu.h:465
spi_conf_t
SPI configuration structure type.
Definition: periph_cpu.h:273