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cfg_spi_default.h
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/*
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* Copyright (C) 2016 Kees Bakker, SODAQ
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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#ifndef CFG_SPI_DEFAULT_H
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#define CFG_SPI_DEFAULT_H
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#include <stdint.h>
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#include "cpu.h"
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#include "periph_cpu.h"
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#ifdef __cplusplus
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extern
"C"
{
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#endif
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static
const
spi_conf_t
spi_config[] = {
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{
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.
dev
= &SERCOM3->SPI,
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.miso_pin =
GPIO_PIN
(
PA
, 22),
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.mosi_pin =
GPIO_PIN
(
PA
, 20),
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.clk_pin =
GPIO_PIN
(
PA
, 21),
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.miso_mux =
GPIO_MUX_C
,
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.mosi_mux =
GPIO_MUX_D
,
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.clk_mux =
GPIO_MUX_D
,
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.miso_pad =
SPI_PAD_MISO_0
,
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.mosi_pad =
SPI_PAD_MOSI_2_SCK_3
,
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.gclk_src =
SAM0_GCLK_MAIN
,
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#ifdef MODULE_PERIPH_DMA
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.tx_trigger = SERCOM3_DMAC_ID_TX,
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.rx_trigger = SERCOM3_DMAC_ID_RX,
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#endif
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},
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};
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#define SPI_NUMOF ARRAY_SIZE(spi_config)
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#ifdef __cplusplus
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}
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#endif
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#endif
/* CFG_SPI_DEFAULT_H */
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SAM0_GCLK_MAIN
@ SAM0_GCLK_MAIN
48 MHz main clock
Definition:
periph_cpu.h:59
SPI_PAD_MISO_0
@ SPI_PAD_MISO_0
use pad 0 for MISO line
Definition:
periph_cpu_common.h:327
GPIO_MUX_C
@ GPIO_MUX_C
select peripheral function C
Definition:
periph_cpu_common.h:138
SPI_PAD_MOSI_2_SCK_3
@ SPI_PAD_MOSI_2_SCK_3
use pad 2 for MOSI, pad 3 for SCK
Definition:
periph_cpu_common.h:338
GPIO_PIN
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition:
periph_cpu.h:35
GPIO_MUX_D
@ GPIO_MUX_D
select peripheral function D
Definition:
periph_cpu_common.h:139
PA
@ PA
port A
Definition:
periph_cpu_common.h:88
spi_conf_t::dev
SPI_Type * dev
SPI device to use.
Definition:
periph_cpu.h:465
spi_conf_t
SPI configuration structure type.
Definition:
periph_cpu.h:273
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