periph_conf.h
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1 /*
2  * Copyright (C) 2014 Freie Universität Berlin
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser General
5  * Public License v2.1. See the file LICENSE in the top level directory for more
6  * details.
7  */
8 
19 #ifndef PERIPH_CONF_H
20 #define PERIPH_CONF_H
21 
22 /* This board provides an LSE */
23 #ifndef CONFIG_BOARD_HAS_LSE
24 #define CONFIG_BOARD_HAS_LSE 1
25 #endif
26 
27 /* HSE is clocked at 16MHz */
28 #ifndef CONFIG_BOARD_HAS_HSE
29 #define CONFIG_BOARD_HAS_HSE 1
30 #endif
31 #define CLOCK_HSE MHZ(16)
32 
33 #include "periph_cpu.h"
34 #include "clk_conf.h"
35 
36 #ifdef __cplusplus
37 extern "C" {
38 #endif
39 
44 static const timer_conf_t timer_config[] = {
45  {
46  .dev = TIM2,
47  .max = 0x0000ffff,
48  .rcc_mask = RCC_APB1ENR_TIM2EN,
49  .bus = APB1,
50  .irqn = TIM2_IRQn
51  },
52  {
53  .dev = TIM3,
54  .max = 0x0000ffff,
55  .rcc_mask = RCC_APB1ENR_TIM3EN,
56  .bus = APB1,
57  .irqn = TIM3_IRQn
58  }
59 };
60 
61 #define TIMER_0_ISR isr_tim2
62 #define TIMER_1_ISR isr_tim3
63 
64 #define TIMER_NUMOF ARRAY_SIZE(timer_config)
65 
71 static const uart_conf_t uart_config[] = {
72  {
73  .dev = USART2,
74  .rcc_mask = RCC_APB1ENR_USART2EN,
75  .rx_pin = GPIO_PIN(PORT_A, 3),
76  .tx_pin = GPIO_PIN(PORT_A, 2),
77  .bus = APB1,
78  .irqn = USART2_IRQn
79  },
80  {
81  .dev = USART1,
82  .rcc_mask = RCC_APB2ENR_USART1EN,
83  .rx_pin = GPIO_PIN(PORT_A, 10),
84  .tx_pin = GPIO_PIN(PORT_A, 9),
85  .bus = APB2,
86  .irqn = USART1_IRQn
87  }
88 };
89 
90 #define UART_0_ISR (isr_usart2)
91 #define UART_1_ISR (isr_usart1)
92 
93 #define UART_NUMOF ARRAY_SIZE(uart_config)
94 
100 static const spi_conf_t spi_config[] = {
101  {
102  .dev = SPI2,
103  .mosi_pin = GPIO_PIN(PORT_B, 15),
104  .miso_pin = GPIO_PIN(PORT_B, 14),
105  .sclk_pin = GPIO_PIN(PORT_B, 13),
106  .cs_pin = GPIO_UNDEF,
107  .rccmask = RCC_APB1ENR_SPI2EN,
108  .apbbus = APB1
109  }
110 };
111 
112 #define SPI_NUMOF ARRAY_SIZE(spi_config)
113 
119 #ifndef RTT_FREQUENCY
120 #define RTT_FREQUENCY (1) /* in Hz */
121 #endif
122 
128 static const i2c_conf_t i2c_config[] = {
129  {
130  .dev = I2C1,
131  .speed = I2C_SPEED_NORMAL,
132  .scl_pin = GPIO_PIN(PORT_B, 6),
133  .sda_pin = GPIO_PIN(PORT_B, 7),
134  .bus = APB1,
135  .rcc_mask = RCC_APB1ENR_I2C1EN,
136  .clk = CLOCK_APB1,
137  .irqn = I2C1_EV_IRQn
138  }
139 };
140 
141 #define I2C_0_ISR isr_i2c1_ev
142 
143 #define I2C_NUMOF ARRAY_SIZE(i2c_config)
144 
146 #ifdef __cplusplus
147 }
148 #endif
149 
150 #endif /* PERIPH_CONF_H */
151 
I2C_SPEED_NORMAL
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition: i2c.h:177
PORT_A
@ PORT_A
port A
Definition: periph_cpu.h:36
GPIO_UNDEF
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
Definition: periph_cpu_common.h:52
uart_conf_t
UART device configuration.
Definition: periph_cpu.h:166
uart_conf_t::dev
cc2538_uart_t * dev
pointer to the used UART device
Definition: periph_cpu.h:167
timer_conf_t
Timer configuration.
Definition: periph_cpu.h:288
GPIO_PIN
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:35
APB2
@ APB2
APB2 bus.
Definition: periph_cpu.h:177
i2c_conf_t
I2C configuration options.
Definition: periph_cpu.h:128
timer_conf_t::dev
uint32_t dev
Address of timer base.
Definition: periph_cpu.h:112
PORT_B
@ PORT_B
port B
Definition: periph_cpu.h:37
spi_conf_t::dev
SPI_Type * dev
SPI device to use.
Definition: periph_cpu.h:465
spi_conf_t
SPI configuration structure type.
Definition: periph_cpu.h:273
i2c_conf_t::dev
I2C_TypeDef * dev
USART device used.
Definition: periph_cpu.h:247
APB1
@ APB1
APB1 bus.
Definition: periph_cpu.h:176