periph_conf.h
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1 /*
2  * Copyright (C) 2016 Frits Kuipers
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser
5  * General Public License v2.1. See the file LICENSE in the top level
6  * directory for more details.
7  */
8 
19 #ifndef PERIPH_CONF_H
20 #define PERIPH_CONF_H
21 
22 #include "periph_cpu.h"
23 #include "clk_conf.h"
24 
25 #ifdef __cplusplus
26 extern "C" {
27 #endif
28 
33 static const timer_conf_t timer_config[] = {
34  {
35  .dev = TIM2,
36  .max = 0x0000ffff,
37  .rcc_mask = RCC_APB1ENR_TIM2EN,
38  .bus = APB1,
39  .irqn = TIM2_IRQn
40  },
41  {
42  .dev = TIM3,
43  .max = 0x0000ffff,
44  .rcc_mask = RCC_APB1ENR_TIM3EN,
45  .bus = APB1,
46  .irqn = TIM3_IRQn
47  }
48 };
49 
50 #define TIMER_0_ISR isr_tim2
51 #define TIMER_1_ISR isr_tim3
52 
53 #define TIMER_NUMOF ARRAY_SIZE(timer_config)
54 
60 static const uart_conf_t uart_config[] = {
61  {
62  .dev = USART2,
63  .rcc_mask = RCC_APB1ENR_USART2EN,
64  .rx_pin = GPIO_PIN(PORT_A, 3),
65  .tx_pin = GPIO_PIN(PORT_A, 2),
66  .bus = APB1,
67  .irqn = USART2_IRQn
68  },
69  {
70  .dev = USART1,
71  .rcc_mask = RCC_APB2ENR_USART1EN,
72  .rx_pin = GPIO_PIN(PORT_A, 10),
73  .tx_pin = GPIO_PIN(PORT_A, 9),
74  .bus = APB2,
75  .irqn = USART1_IRQn
76  },
77  {
78  .dev = USART3,
79  .rcc_mask = RCC_APB1ENR_USART3EN,
80  .rx_pin = GPIO_PIN(PORT_B, 11),
81  .tx_pin = GPIO_PIN(PORT_B, 10),
82  .bus = APB1,
83  .irqn = USART3_IRQn
84  }
85 };
86 
87 #define UART_0_ISR isr_usart2
88 #define UART_1_ISR isr_usart1
89 #define UART_2_ISR isr_usart3
90 
91 #define UART_NUMOF ARRAY_SIZE(uart_config)
92 
98 static const i2c_conf_t i2c_config[] = {
99  {
100  .dev = I2C1,
101  .speed = I2C_SPEED_NORMAL,
102  .scl_pin = GPIO_PIN(PORT_B, 8), /* D15 */
103  .sda_pin = GPIO_PIN(PORT_B, 9), /* D16 */
104  .bus = APB1,
105  .rcc_mask = RCC_APB1ENR_I2C1EN,
106  .clk = CLOCK_APB1,
107  .irqn = I2C1_EV_IRQn
108  },
109  {
110  .dev = I2C2,
111  .speed = I2C_SPEED_NORMAL,
112  .scl_pin = GPIO_PIN(PORT_B, 10), /* D1 */
113  .sda_pin = GPIO_PIN(PORT_B, 11), /* D0 */
114  .bus = APB1,
115  .rcc_mask = RCC_APB1ENR_I2C2EN,
116  .clk = CLOCK_APB1,
117  .irqn = I2C2_EV_IRQn
118  }
119 };
120 
121 #define I2C_0_ISR isr_i2c1_ev
122 #define I2C_1_ISR isr_i2c2_ev
123 
124 #define I2C_NUMOF ARRAY_SIZE(i2c_config)
125 
131 static const spi_conf_t spi_config[] = {
132  {
133  .dev = SPI1,
134  .mosi_pin = GPIO_PIN(PORT_A, 7),
135  .miso_pin = GPIO_PIN(PORT_A, 6),
136  .sclk_pin = GPIO_PIN(PORT_A, 5),
137  .cs_pin = GPIO_UNDEF,
138  .rccmask = RCC_APB2ENR_SPI1EN,
139  .apbbus = APB2
140  },
141  {
142  .dev = SPI2,
143  .mosi_pin = GPIO_PIN(PORT_B, 15),
144  .miso_pin = GPIO_PIN(PORT_B, 14),
145  .sclk_pin = GPIO_PIN(PORT_B, 13),
146  .cs_pin = GPIO_UNDEF,
147  .rccmask = RCC_APB1ENR_SPI2EN,
148  .apbbus = APB1
149  }
150 };
151 
152 #define SPI_NUMOF ARRAY_SIZE(spi_config)
153 
155 #ifdef __cplusplus
156 }
157 #endif
158 
159 #endif /* PERIPH_CONF_H */
I2C_SPEED_NORMAL
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition: i2c.h:177
PORT_A
@ PORT_A
port A
Definition: periph_cpu.h:36
GPIO_UNDEF
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
Definition: periph_cpu_common.h:52
uart_conf_t
UART device configuration.
Definition: periph_cpu.h:166
uart_conf_t::dev
cc2538_uart_t * dev
pointer to the used UART device
Definition: periph_cpu.h:167
timer_conf_t
Timer configuration.
Definition: periph_cpu.h:288
GPIO_PIN
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:35
APB2
@ APB2
APB2 bus.
Definition: periph_cpu.h:177
i2c_conf_t
I2C configuration options.
Definition: periph_cpu.h:128
timer_conf_t::dev
uint32_t dev
Address of timer base.
Definition: periph_cpu.h:112
PORT_B
@ PORT_B
port B
Definition: periph_cpu.h:37
spi_conf_t::dev
SPI_Type * dev
SPI device to use.
Definition: periph_cpu.h:465
spi_conf_t
SPI configuration structure type.
Definition: periph_cpu.h:273
i2c_conf_t::dev
I2C_TypeDef * dev
USART device used.
Definition: periph_cpu.h:247
APB1
@ APB1
APB1 bus.
Definition: periph_cpu.h:176