periph_conf.h
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1 /*
2  * Copyright (C) 2019 Kees Bakker, SODAQ
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser
5  * General Public License v2.1. See the file LICENSE in the top level
6  * directory for more details.
7  */
8 
19 #ifndef PERIPH_CONF_H
20 #define PERIPH_CONF_H
21 
22 #include <stdint.h>
23 
24 #include "cpu.h"
25 #include "periph_cpu.h"
26 #include "cfg_clock_default.h"
27 #include "cfg_rtc_default.h"
28 #include "cfg_rtt_default.h"
29 #include "cfg_timer_default.h"
30 #include "cfg_usbdev_default.h"
31 
32 #ifdef __cplusplus
33 extern "C" {
34 #endif
35 
40 static const uart_conf_t uart_config[] = {
41  {
42  .dev = &SERCOM5->USART,
43  .rx_pin = GPIO_PIN(PB, 3), /* D0, RX Pin */
44  .tx_pin = GPIO_PIN(PB, 2), /* D1, TX Pin */
45 #ifdef MODULE_PERIPH_UART_HW_FC
46  .rts_pin = GPIO_UNDEF,
47  .cts_pin = GPIO_UNDEF,
48 #endif
49  .mux = GPIO_MUX_D,
50  .rx_pad = UART_PAD_RX_1,
51  .tx_pad = UART_PAD_TX_0,
52  .flags = UART_FLAG_NONE,
53  .gclk_src = SAM0_GCLK_MAIN,
54  },
55  {
56  /* Connected to the UBlox */
57  .dev = &SERCOM2->USART,
58  .rx_pin = GPIO_PIN(PA, 13),
59  .tx_pin = GPIO_PIN(PA, 12),
60 #ifdef MODULE_PERIPH_UART_HW_FC
61  .rts_pin = GPIO_UNDEF,
62  .cts_pin = GPIO_UNDEF,
63 #endif
64  .mux = GPIO_MUX_C,
65  .rx_pad = UART_PAD_RX_1,
66  .tx_pad = UART_PAD_TX_0,
67  .flags = UART_FLAG_NONE,
68  .gclk_src = SAM0_GCLK_MAIN,
69  },
70 };
71 
72 /* interrupt function name mapping */
73 #define UART_0_ISR isr_sercom5
74 #define UART_1_ISR isr_sercom2
75 
76 #define UART_NUMOF ARRAY_SIZE(uart_config)
77 
84 /* ADC Default values */
85 #define ADC_PRESCALER ADC_CTRLB_PRESCALER_DIV512
86 
87 #define ADC_NEG_INPUT ADC_INPUTCTRL_MUXNEG_GND
88 #define ADC_GAIN_FACTOR_DEFAULT ADC_INPUTCTRL_GAIN_DIV2
89 #define ADC_REF_DEFAULT ADC_REFCTRL_REFSEL_INTVCC1
90 
91 static const adc_conf_chan_t adc_channels[] = {
92  /* port, pin, muxpos */
93  {GPIO_PIN(PA, 2), ADC_INPUTCTRL_MUXPOS_PIN0}, /* A0 */
94  {GPIO_PIN(PA, 3), ADC_INPUTCTRL_MUXPOS_PIN1}, /* A1 */
95  {GPIO_PIN(PB, 8), ADC_INPUTCTRL_MUXPOS_PIN2}, /* A2 */
96  {GPIO_PIN(PB, 9), ADC_INPUTCTRL_MUXPOS_PIN3}, /* A3 */
97  {GPIO_PIN(PA, 6), ADC_INPUTCTRL_MUXPOS_PIN6}, /* A4 */
98  {GPIO_PIN(PA, 7), ADC_INPUTCTRL_MUXPOS_PIN7}, /* A5 */
99  {GPIO_PIN(PA, 8), ADC_INPUTCTRL_MUXPOS_PIN16}, /* A6 */
100  {GPIO_PIN(PA, 9), ADC_INPUTCTRL_MUXPOS_PIN17}, /* A7 */
101  {GPIO_PIN(PA,10), ADC_INPUTCTRL_MUXPOS_PIN18}, /* A8 */
102  {GPIO_PIN(PA,11), ADC_INPUTCTRL_MUXPOS_PIN19}, /* A9 */
103 #if 0
104  /* These pins are also used for RX/TX uart0 */
105  {GPIO_PIN(PB, 2), ADC_INPUTCTRL_MUXPOS_PIN10}, /* A10, TX */
106  {GPIO_PIN(PB, 3), ADC_INPUTCTRL_MUXPOS_PIN11}, /* A11, RX */
107 #endif
108  {GPIO_PIN(PA, 5), ADC_INPUTCTRL_MUXPOS_PIN5}, /* BAT_VOLT */
109 };
110 
111 #define ADC_NUMOF ARRAY_SIZE(adc_channels)
112 
118 static const spi_conf_t spi_config[] = {
119  {
120  .dev = &SERCOM0->SPI,
121  .miso_pin = GPIO_PIN(PA, 8),
122  .mosi_pin = GPIO_PIN(PA, 10),
123  .clk_pin = GPIO_PIN(PA, 11),
124  .miso_mux = GPIO_MUX_C,
125  .mosi_mux = GPIO_MUX_C,
126  .clk_mux = GPIO_MUX_C,
127  .miso_pad = SPI_PAD_MISO_0,
128  .mosi_pad = SPI_PAD_MOSI_2_SCK_3,
129  .gclk_src = SAM0_GCLK_MAIN,
130 #ifdef MODULE_PERIPH_DMA
131  .tx_trigger = SERCOM0_DMAC_ID_TX,
132  .rx_trigger = SERCOM0_DMAC_ID_RX,
133 #endif
134  }
135 };
136 
137 #define SPI_NUMOF ARRAY_SIZE(spi_config)
138 
144 static const i2c_conf_t i2c_config[] = {
145  {
146  .dev = &(SERCOM3->I2CM),
147  .speed = I2C_SPEED_NORMAL,
148  .scl_pin = GPIO_PIN(PA, 23),
149  .sda_pin = GPIO_PIN(PA, 22),
150  .mux = GPIO_MUX_C,
151  .gclk_src = SAM0_GCLK_MAIN,
152  .flags = I2C_FLAG_NONE
153  }
154 };
155 #define I2C_NUMOF ARRAY_SIZE(i2c_config)
156 
158 #ifdef __cplusplus
159 }
160 #endif
161 
162 #endif /* PERIPH_CONF_H */
163 
SAM0_GCLK_MAIN
@ SAM0_GCLK_MAIN
48 MHz main clock
Definition: periph_cpu.h:59
I2C_SPEED_NORMAL
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition: i2c.h:177
UART_PAD_TX_0
@ UART_PAD_TX_0
select pad 0
Definition: periph_cpu_common.h:161
I2C_FLAG_NONE
@ I2C_FLAG_NONE
No flags set.
Definition: periph_cpu_common.h:407
UART_FLAG_NONE
@ UART_FLAG_NONE
No flags set.
Definition: periph_cpu_common.h:171
PB
@ PB
port B
Definition: periph_cpu_common.h:89
UART_PAD_RX_1
@ UART_PAD_RX_1
select pad 1
Definition: periph_cpu_common.h:152
SPI_PAD_MISO_0
@ SPI_PAD_MISO_0
use pad 0 for MISO line
Definition: periph_cpu_common.h:327
cfg_rtc_default.h
Default RTC configuration for SODAQ boards.
GPIO_UNDEF
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
Definition: periph_cpu_common.h:52
uart_conf_t
UART device configuration.
Definition: periph_cpu.h:166
adc_channels
static const gpio_t adc_channels[]
Static array with declared ADC channels.
Definition: periph_conf_common.h:53
GPIO_MUX_C
@ GPIO_MUX_C
select peripheral function C
Definition: periph_cpu_common.h:138
uart_conf_t::dev
cc2538_uart_t * dev
pointer to the used UART device
Definition: periph_cpu.h:167
SPI_PAD_MOSI_2_SCK_3
@ SPI_PAD_MOSI_2_SCK_3
use pad 2 for MOSI, pad 3 for SCK
Definition: periph_cpu_common.h:338
GPIO_PIN
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:35
adc_conf_chan_t
ADC Channel Configuration.
Definition: periph_cpu_common.h:765
GPIO_MUX_D
@ GPIO_MUX_D
select peripheral function D
Definition: periph_cpu_common.h:139
cfg_usbdev_default.h
Default usbdev configuration for SODAQ boards.
PA
@ PA
port A
Definition: periph_cpu_common.h:88
i2c_conf_t
I2C configuration options.
Definition: periph_cpu.h:128
spi_conf_t::dev
SPI_Type * dev
SPI device to use.
Definition: periph_cpu.h:465
spi_conf_t
SPI configuration structure type.
Definition: periph_cpu.h:273
i2c_conf_t::dev
I2C_TypeDef * dev
USART device used.
Definition: periph_cpu.h:247