periph_conf.h
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1 /*
2  * Copyright (C) 2019 Mesotic SAS
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser
5  * General Public License v2.1. See the file LICENSE in the top level
6  * directory for more details.
7  */
8 
20 #ifndef PERIPH_CONF_H
21 #define PERIPH_CONF_H
22 
23 #include "periph_cpu.h"
24 
25 #ifdef __cplusplus
26 extern "C" {
27 #endif
28 
32 #define CLOCK_CORECLOCK (16000000U)
33 
38 #define USE_VREG_BUCK (1)
39 
44 static const tc32_conf_t timer_config[] = {
45  { /* Timer 0 - System Clock */
46  .dev = TC0,
47  .irq = TC0_IRQn,
48  .mclk = &MCLK->APBCMASK.reg,
49  .mclk_mask = MCLK_APBCMASK_TC0 | MCLK_APBCMASK_TC1,
50  .gclk_id = TC0_GCLK_ID,
51  .gclk_src = SAM0_GCLK_MAIN,
52  .flags = TC_CTRLA_MODE_COUNT32,
53  },
54  {
55  .dev = TC2,
56  .irq = TC2_IRQn,
57  .mclk = &MCLK->APBCMASK.reg,
58  .mclk_mask = MCLK_APBCMASK_TC2,
59  .gclk_id = TC2_GCLK_ID,
60  .gclk_src = SAM0_GCLK_MAIN,
61  .flags = TC_CTRLA_MODE_COUNT16,
62  }
63 };
64 
65 /* Timer 0 configuration */
66 #define TIMER_0_CHANNELS 2
67 #define TIMER_0_ISR isr_tc0
68 
69 /* Timer 1 configuration */
70 #define TIMER_1_CHANNELS 2
71 #define TIMER_1_ISR isr_tc2
72 #define TIMER_1_MAX_VALUE 0xffff
73 
74 #define TIMER_NUMOF ARRAY_SIZE(timer_config)
75 
81 static const uart_conf_t uart_config[] = {
82  { /* Virtual COM Port */
83  .dev = &SERCOM2->USART,
84  .rx_pin = GPIO_PIN(PA, 25),
85  .tx_pin = GPIO_PIN(PA, 24),
86 #ifdef MODULE_PERIPH_UART_HW_FC
87  .rts_pin = GPIO_UNDEF,
88  .cts_pin = GPIO_UNDEF,
89 #endif
90  .mux = GPIO_MUX_D,
91  .rx_pad = UART_PAD_RX_3,
92  .tx_pad = UART_PAD_TX_2,
93  .flags = UART_FLAG_NONE,
94  .gclk_src = SAM0_GCLK_MAIN,
95  },
96  { /* EXT1 */
97  .dev = &SERCOM1->USART,
98  .rx_pin = GPIO_PIN(PA, 9),
99  .tx_pin = GPIO_PIN(PA, 8),
100 #ifdef MODULE_PERIPH_UART_HW_FC
101  .rts_pin = GPIO_UNDEF,
102  .cts_pin = GPIO_UNDEF,
103 #endif
104  .mux = GPIO_MUX_C,
105  .rx_pad = UART_PAD_RX_1,
106  .tx_pad = UART_PAD_TX_0,
107  .flags = UART_FLAG_NONE,
108  .gclk_src = SAM0_GCLK_MAIN,
109  }
110 };
111 
112 /* interrupt function name mapping */
113 #define UART_0_ISR isr_sercom2_2
114 #define UART_0_ISR_TX isr_sercom2_0
115 #define UART_1_ISR isr_sercom1_2
116 #define UART_1_ISR_TX isr_sercom1_0
117 
118 #define UART_NUMOF ARRAY_SIZE(uart_config)
119 
125 #define PWM_0_EN 1
126 #define PWM_1_EN 0
127 
128 #if PWM_0_EN
129 /* PWM0 channels */
130 static const pwm_conf_chan_t pwm_chan0_config[] = {
131  /* GPIO pin, MUX value, TC channel */
132  { GPIO_PIN(PA, 18), GPIO_MUX_E, 0 },
133  { GPIO_PIN(PA, 19), GPIO_MUX_E, 1 },
134 };
135 #endif
136 #if PWM_1_EN
137 /* PWM1 channels */
138 static const pwm_conf_chan_t pwm_chan1_config[] = {
139  /* GPIO pin, MUX value, TC channel */
140  { GPIO_PIN(PA, 7), GPIO_MUX_E, 1 }, /* LED */
141 };
142 #endif
143 
144 /* PWM device configuration */
145 static const pwm_conf_t pwm_config[] = {
146 #if PWM_0_EN
147  { .tim = TC_CONFIG(TC2),
148  .chan = pwm_chan0_config,
149  .chan_numof = ARRAY_SIZE(pwm_chan0_config),
150  .gclk_src = SAM0_GCLK_MAIN,
151  },
152 #endif
153 #if PWM_1_EN
154  /* conflicts with xtimer config (TC0_TC1) */
155  { .tim = TC_CONFIG(TC1),
156  .chan = pwm_chan1_config,
157  .chan_numof = ARRAY_SIZE(pwm_chan0_config),
158  .gclk_src = SAM0_GCLK_MAIN,
159  },
160 #endif
161 };
162 
163 /* number of devices that are actually defined */
164 #define PWM_NUMOF ARRAY_SIZE(pwm_config)
165 
171 static const spi_conf_t spi_config[] = {
172  {
173  .dev = &(SERCOM0->SPI),
174  .miso_pin = GPIO_PIN(PA, 4),
175  .mosi_pin = GPIO_PIN(PA, 14),
176  .clk_pin = GPIO_PIN(PA, 15),
177  .miso_mux = GPIO_MUX_D,
178  .mosi_mux = GPIO_MUX_D,
179  .clk_mux = GPIO_MUX_D,
180  .miso_pad = SPI_PAD_MISO_0,
181  .mosi_pad = SPI_PAD_MOSI_2_SCK_3,
182  .gclk_src = SAM0_GCLK_MAIN,
183 #ifdef MODULE_PERIPH_DMA
184  .tx_trigger = SERCOM0_DMAC_ID_TX,
185  .rx_trigger = SERCOM0_DMAC_ID_RX,
186 #endif
187  }
188 };
189 
190 #define SPI_NUMOF ARRAY_SIZE(spi_config)
191 
197 static const i2c_conf_t i2c_config[] = {
198  {
199  .dev = &(SERCOM1->I2CM),
200  .speed = I2C_SPEED_NORMAL,
201  .scl_pin = GPIO_PIN(PA, 17),
202  .sda_pin = GPIO_PIN(PA, 16),
203  .mux = GPIO_MUX_C,
204  .gclk_src = SAM0_GCLK_MAIN,
205  .flags = I2C_FLAG_NONE
206  }
207 };
208 
209 #define I2C_NUMOF ARRAY_SIZE(i2c_config)
210 
216 #define EXTERNAL_OSC32_SOURCE 1
217 #define ULTRA_LOW_POWER_INTERNAL_OSC_SOURCE 0
218 
224 #ifndef RTT_FREQUENCY
225 #define RTT_FREQUENCY (32768U)
226 #endif
227 
234 /* ADC Default values */
235 #define ADC_PRESCALER ADC_CTRLB_PRESCALER_DIV256
236 
237 #define ADC_NEG_INPUT ADC_INPUTCTRL_MUXNEG(0x18u)
238 #define ADC_REF_DEFAULT ADC_REFCTRL_REFSEL_INTVCC2
239 
240 static const adc_conf_chan_t adc_channels[] = {
241  /* port, pin, muxpos */
242  {GPIO_PIN(PA, 10), ADC_INPUTCTRL_MUXPOS(ADC_INPUTCTRL_MUXPOS_AIN8)},
243 };
244 
245 #define ADC_NUMOF ARRAY_SIZE(adc_channels)
246 
252 #define DAC_CLOCK SAM0_GCLK_32KHZ
253  /* use Vcc as reference voltage */
254 #define DAC_VREF DAC_CTRLB_REFSEL_AVCC
255 
257 #ifdef __cplusplus
258 }
259 #endif
260 
261 #endif /* PERIPH_CONF_H */
262 
UART_PAD_RX_3
@ UART_PAD_RX_3
select pad 3
Definition: periph_cpu_common.h:154
SAM0_GCLK_MAIN
@ SAM0_GCLK_MAIN
48 MHz main clock
Definition: periph_cpu.h:59
GPIO_MUX_E
@ GPIO_MUX_E
select peripheral function E
Definition: periph_cpu_common.h:140
I2C_SPEED_NORMAL
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition: i2c.h:177
UART_PAD_TX_0
@ UART_PAD_TX_0
select pad 0
Definition: periph_cpu_common.h:161
I2C_FLAG_NONE
@ I2C_FLAG_NONE
No flags set.
Definition: periph_cpu_common.h:407
UART_FLAG_NONE
@ UART_FLAG_NONE
No flags set.
Definition: periph_cpu_common.h:171
ARRAY_SIZE
#define ARRAY_SIZE(a)
Calculate the number of elements in a static array.
Definition: kernel_defines.h:122
pwm_conf_t
PWM device configuration.
Definition: periph_cpu_common.h:153
UART_PAD_RX_1
@ UART_PAD_RX_1
select pad 1
Definition: periph_cpu_common.h:152
SPI_PAD_MISO_0
@ SPI_PAD_MISO_0
use pad 0 for MISO line
Definition: periph_cpu_common.h:327
pwm_conf_chan_t
PWM channel configuration data structure.
Definition: periph_cpu_common.h:307
UART_PAD_TX_2
@ UART_PAD_TX_2
select pad 2
Definition: periph_cpu_common.h:162
GPIO_UNDEF
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
Definition: periph_cpu_common.h:52
uart_conf_t
UART device configuration.
Definition: periph_cpu.h:166
adc_channels
static const gpio_t adc_channels[]
Static array with declared ADC channels.
Definition: periph_conf_common.h:53
tc32_conf_t::dev
Tc * dev
pointer to the used Timer device
Definition: periph_cpu_common.h:462
GPIO_MUX_C
@ GPIO_MUX_C
select peripheral function C
Definition: periph_cpu_common.h:138
uart_conf_t::dev
cc2538_uart_t * dev
pointer to the used UART device
Definition: periph_cpu.h:167
SPI_PAD_MOSI_2_SCK_3
@ SPI_PAD_MOSI_2_SCK_3
use pad 2 for MOSI, pad 3 for SCK
Definition: periph_cpu_common.h:338
GPIO_PIN
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:35
adc_conf_chan_t
ADC Channel Configuration.
Definition: periph_cpu_common.h:765
tc32_conf_t
Timer device configuration.
Definition: periph_cpu_common.h:461
TC_CONFIG
#define TC_CONFIG(tim)
Static initializer for TC timer configuration.
Definition: periph_cpu_common.h:279
GPIO_MUX_D
@ GPIO_MUX_D
select peripheral function D
Definition: periph_cpu_common.h:139
PA
@ PA
port A
Definition: periph_cpu_common.h:88
i2c_conf_t
I2C configuration options.
Definition: periph_cpu.h:128
spi_conf_t::dev
SPI_Type * dev
SPI device to use.
Definition: periph_cpu.h:465
spi_conf_t
SPI configuration structure type.
Definition: periph_cpu.h:273
i2c_conf_t::dev
I2C_TypeDef * dev
USART device used.
Definition: periph_cpu.h:247
pwm_conf_t::tim
tc_tcc_cfg_t tim
timer configuration
Definition: periph_cpu_common.h:317